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MB90560 series
CHAPTER 12 MULTI-FUNCTION TIMER
323
Table 12.3.5.3-1 Waveform Control Register (SIGCR)
Bit
Function
Bit 7
DTIE:
DTTI input
enable
bit
This bit is used to enable to receive DTTI input to control the
output level of RTO0~5 pin.
Bit 6
DTIL:
DTTI input
polarity selection
bit
This bit is used to select the level polarity of DTTI input to
control the output level of RTO0~5 pin.
Bit 5
NRSL:
Noise cancelling
function
selection bit
This bit is used to select the noise cancelling function.
Noise cancelling circuit will receive DTTI input signal when the
valid level is held until the counter overflows. The counter is 2-
bit counter which is operated by the valid level input.
Note:
To cancel the noise pulse width, it takes approximately
4 machine cycles.
When the noise cancelling circuit is selected, the input
will become invalid if the internal clock is stopped, for
example in stop mode.
Bit 4
Bit 3
Bit 2
DCK2~0:
Operating clock
Selection
bit
These bits are used to select the operating clock for the 8-bit
timer.
Bit 1
Bit 0
PGS1, PGS0:
PPG output to
RTO selection
bit
These bits are to select which the PPG timer is used to output
pulses directly to RTO0~5.
When the 8-bit timer control register, bit 14:GTEN is set to “1”,
GATE signal (synchronized mode) will be output to the
corresponding PPG.
Note:
The operation mode in the table on the Figure 12.3.5.3-
1 is written with PPG timer setting, so the
corresponding PPG timer output and operation start/
stop control is possible when setting 16-bit mode for
the PPG timer.
Also, PPG output is possible without using PPG timer
GATE function (asynchronized mode), but PPG timer
must be operating in software initiation.