![](http://datasheet.mmic.net.cn/330000/MB90F562_datasheet_16437954/MB90F562_438.png)
414
CHAPTER 14 DTP/EXTERNAL INTERRUPT CIRCUIT
MB90560 series
14.5 Operation of the DTP/External Interrupt Circuit
The DTP/external interrupt circuit provides the external interrupt function and the DTP
function. This section describes the settings required for each function and the
operation of the circuit.
I
Setting the DTP/external interrupt circuit
Figure 14.5-1 shows the settings required to operate the DTP/external interrupt circuit.
Figure 14.5-1 DTP/external interrupt circuit
Set the DTP/external interrupt circuit registers with the following procedure:
1. Clear the target bit of the DTP/interrupt enable register (ENIR) to disable interrupts.
2. Set the target bit of the request level setting register (ELVR).
3. Clear the target bit of the DTP/interrupt cause register (EIRR).
4. Set the target bit of the DTP/interrupt enable register (ENIR) to enable interrupts.
The procedure for setting the DTP/external interrupt circuit registers must start with disabling the
output of external interrupt requests (ENIR: EN7 to EN0 = 0). Before the output of external
interrupt requests can be enabled (ENIR: EN7 to EN0 = 1), the corresponding interrupt request
flag bits must be cleared (EIRR: ER7 to ER0 = 0).
This is in order to avoid interrupt requests from being generated accidentally while the registers
are being set.
ICR08
/ ICR07
ICS3
Bit7
Bit0
ICS2 ICS1 ICS0 ISE
IL2
IL1
IL0
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
ICS3
Bit15
Bit8
ICS2 ICS1 ICS0 ISE
IL2
IL1
IL0
Bit14 Bit13 Bit12 Bit11 Bit10 Bit9
EN7 EN6 EN5 EN4 EN3 EN2 EN1 EN0
ER7 ER6 ER5 ER4 ER3 ER2 ER1 ER0
EIRR
/ ENIR
For the external interrupt function
:
:
:
:
:
1
Used
Set the bit to "1" when this is used.
0
For the DTP function
LB3 LA3 LB2 LA2 LB1 LA1 LB0 LA0
LB7 LA7 LB6 LA6 LB5 LA5 LB4 LA4
ELVR
P16 P15 P14 P13 P12 P11 P10
P63
DDR6/1
Set the bit to "0" when this is used.
Specifies "0".
Specifies "1".