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型號(hào)：	MB90V560
廠商：	Fujitsu Limited
英文描述：	16-BIT MICROCONTROLLER
中文描述：	16位微控制器
文件頁(yè)數(shù)：	444/581頁(yè)
文件大?。?/td>	3144K
代理商：	MB90V560

CHAPTER 14 DTP/EXTERNAL INTERRUPT CIRCUIT

MB90560 series

14.6 Usage Notes on the DTP/External Interrupt Circuit

Notes on the signal to be input to the DTP/external interrupt circuit, release from

standby mode, and interrupts are given below.

Usage notes on the DTP/external interrupt circuit

Conditions for external peripherals using the DTP function

To support the DTP function, external peripherals must be able to clear data transfer requests

automatically in response to transfer operations. If a transfer request is not removed within three

machine cycles of the start of transfer, the DTP/external interrupt circuit interprets the request as

another transfer request.

Input polarities of external interrupts

If the request level setting register (ELVR) is set so that an edge is detected, the pulse width

must be at least three machine cycles for the edge to be detected.

If the register is set for level detection, and the level to be detected as an interrupt cause is

input, cause F/F in the DTP/interrupt cause register (EIRR) is set to “1” to store the cause, as

shown in Figure 14.6-1. Even if the cause is removed, the request to the interrupt controller

remains active provided the output of interrupt requests is enabled. Thus, to cancel the

request to the interrupt controller, clear the external interrupt request flag bit and cause F/F,

as shown in Figure 14.6-2.

Figure 14.6-1 Clearing the cause retention circuit when a level is specified

Figure 14.6-2 DTP/external interrupt cause and interrupt request when the output

of interrupt requests is enabled

DTP/external

interrupt cause

To the interrupt

(interrupt request)

DTP/interrupt input

detection circuit

(in the EIRR register)

The cause is stored until the register is cleared.

DTP/external interrupt

cause (when the

H level is detected)

Interrupt request to the

interrupt controller

Removal of the interrupt cause

Becomes inactive by clearing cause F/F.

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