512
APPENDIX B INSTRUCTIONS
MB90560 series
Table B.8-3 Addition/subtraction (byte, word, long-word): 42 instructions
<Caution>
See Table B.5-1, "Number of execution cycles for each type of addressing," and Table B.5-2,
"Compensation values for calculating the number of execution cycles," for (a) to (d) in the
above table.
Mnemonic
A,#imm8
A,dir
A,ear
A,eam
ear,A
eam,A
A
A,ear
A,eam
A
#
2
2
2
~
RG
0
0
1
0
2
0
0
1
0
0
B
0
(b)
0
(b)
0
2×(b)
0
0
(b)
0
Operation
LH
Z
Z
Z
Z
-
Z
Z
Z
Z
Z
AH
-
-
-
-
-
-
-
-
-
-
I
-
-
-
-
-
-
-
-
-
-
S
-
-
-
-
-
-
-
-
-
-
T
-
-
-
-
-
-
-
-
-
-
N
Z
V
C
RMW
-
-
-
-
-
-
-
-
-
ADD
ADD
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDDC
SUB
SUB
SUB
SUB
SUB
SUB
SUBC
SUBC
SUBC
SUBDC
A,#imm8
A,dir
A,ear
A,eam
ear,A
eam,A
A
A,ear
A,eam
A
2+
2
2+
1
2
2+
1
2
2
2
2+
2
2+
1
2
2+
1
2
5
3
4+(a)
3
5+(a)
2
3
4+(a)
3
2
5
3
4+(a)
3
5+(a)
2
3
4+(a)
3
0
0
1
0
2
0
0
1
0
0
0
(b)
0
(b)
0
2×(b)
0
0
(b)
0
byte (A)
←
(A) + imm8
byte (A)
←
(A) + (dir)
byte (A)
←
(A) + (ear)
byte (A)
←
(A) + (eam)
byte (ear)
←
(ear) + (A)
byte (eam)
←
(eam) + (A)
byte (A)
←
(AH) + (AL) + (C)
byte (A)
←
(A) + (ear) + (C)
byte (A)
←
(A) + (eam) + (C)
byte (A)
←
(AH) + (AL) + (C)
(hexadecimal)
byte (A)
←
(A) - imm8
byte (A)
←
(A) - (dir)
byte (A)
←
(A) - (ear)
byte (A)
←
(A) - (eam)
byte (ear)
←
(ear) - (A)
byte (eam)
←
(eam) - (A)
byte (A)
←
(AH) - (AL) - (C)
byte (A)
←
(A) - (ear) - (C)
byte (A)
←
(A) - (eam) - (C)
byte (A)
←
(AH) - (AL) - (C)
(hexadecimal)
word (A)
←
(AH) + (AL)
word (A)
←
(A) + (ear)
word (A)
←
(A) + (eam)
word (A)
←
(A) + imm16
word (ear)
←
(ear) + (A)
word (eam)
←
(eam) + (A)
word (A)
←
(A) + (ear) + (C)
word (A)
←
(A) + (eam) + (C)
word (A)
←
(AH) - (AL)
word (A)
←
(A) - (ear)
word (A)
←
(A) - (eam)
word (A)
←
(A) - imm16
word (ear)
←
(ear) - (A)
word (eam)
←
(eam) - (A)
word (A)
←
(A) - (ear) - (C)
word (A)
←
(A) - (eam) - (C)
long (A)
←
(A) + (ear)
long (A)
←
(A) + (eam)
long (A)
←
(A) + imm32
long (A)
←
(A) - (ear)
long (A)
←
(A) - (eam)
long (A)
←
(A) - imm32
Z
Z
Z
Z
-
-
Z
Z
Z
Z
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ADDW
ADDW
ADDW
ADDW
ADDW
ADDW
ADDCW A,ear
ADDCW A,eam
SUBW
SUBW
SUBW
SUBW
SUBW
SUBW
SUBCW A,ear
SUBCW A,eam
A
A,ear
A,eam
A,#imm16
ear,A
eam,A
A
A,ear
A,eam
A,#imm16
ear,A
eam,A
1
2
2+
3
2
2+
2
2+
1
2
2+
3
2
2+
2
2+
2
3
4+(a)
2
3
5+(a)
3
4+(a)
2
3
4+(a)
2
3
5+(a)
3
4+(a)
0
1
0
0
2
0
1
0
0
1
0
0
2
0
1
0
0
0
(c)
0
0
2×(c)
0
(c)
0
0
(c)
0
0
2×(c)
0
(c)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ADDL
ADDL
ADDL
SUBL
SUBL
SUBL
A,ear
A,eam
A,#imm32
A,ear
A,eam
A,#imm32
2
2+
5
2
2+
5
6
7+(a)
4
6
7+(a)
4
2
0
0
2
0
0
0
(d)
0
0
(d)
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-