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MB90560 series
CHAPTER 11 16-BIT RELOAD TIMER
259
Table 11.4-2 Function description of each bit of the low part of the timer control status
register (TMCSR0, TMCSR1: L)
Bit name
Function
bit6
OUTE:
Timer output enable
bit
This bit enables or disables output from the timer output pin.
When this bit is “0”, the pin functions as a general-purpose port.
When this bit is “1”, the pin functions as a timer output pin.
In reload mode, the output waveform of this timer output pin
toggles. In single-shot mode, the timer outputs a rectangular
waveform that indicates that counting is in progress is output.
bit5
OUTL:
Pin output level
selection bit
This register is used to select the output level of the timer output
pin.
The output level of the pin is inverted depending on whether this bit
is “0” or “1”.
bit4
RELD:
Reload selection bit
This bit enables reloading.
When this bit is “1”, the timer is in reload mode. At the same time an
underflow occurs, the contents of the reload register are loaded into
the counter, and counting continues.
When this bit is “0”, the timer is in single-shot mode. Counting stops
when an underflow occurs.
bit3
INTE:
Interrupt request
enable bit
This bit enables or disables output of an interrupt request to the
CPU.
When this bit and the interrupt request flag (UF) bit are “1”, the timer
outputs an interrupt request.
bit2
UF:
Underflow interrupt
request flag bit
This bit is set to “1” when a counter underflow occurs.
Writing “0” to this bit clears it. Writing “1” to this bit does not change
the bit value and has no effect on other bits.
This bit is also cleared when EI
2
OS is activated.
bit1
CNTE:
Count enable bit
The bit enables or disables counting.
When this bit is set to “1”, the counter is placed in trigger standby
mode. When a trigger occurs, actual counting starts.
bit0
TRG:
Software trigger bit
This bit starts the interval timer function or counter function with
software.
Writing “1” to this bit applies a software trigger, causing the contents
of the reload register to be loaded into the counter and starting
counter operation. Writing “0” to this bit has no effect.
Trigger input from this trigger is always valid when the CNTE bit is
set to “1” regardless of the operating mode.