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MB90560 series
APPENDIX B INSTRUCTIONS
507
B.7
Reading the Instruction List
This section explains the items (Table B.7-1) and codes (Table B.7-2) that appear in
Section B.7, "List of F
2
MC-16L Instructions."
I
Explanation of items covered and instruction codes
Table B.7-1 Items covered in instruction list
Item
Description
Mnemonic
Uppercase alphabetic characters, symbols: Shown as they appear in assembler.
Lowercase alphabetic characters: Placeholders for assembler.
Numerics following lowercase alphabetic characters: Indicates the bit length of instruc-
tions.
#
Indicates the number of bytes.
~
Indicates the number of cycles.
For alphabetic characters in the items, see Table B.3-1.
RG
Indicates the number of register accesses during instruction execution.
Used for calculating compensation values during intermittent operation of the CPU.
B
Indicates compensation values for calculating the actual number of cycles during instruc-
tion execution.
The actual number of cycles is the sum of the values in the
→
column.
Operation
Describes how the instruction operates.
LH
Indicates special operations with respect to accumulator bits 08 to 15.
Z:
Transfers zero.
X:
Transfers using sign extension.
-:
No transfer
AH
Indicates special operations with respect to the upper 16 bits of the accumulator.
*:
Transfers from AL to AH.
-:
No transfer
Z:
Transfers 00 to AH.
X:
Using AL sign extension, transfers 00H or FFH to AH.
I
Indicates status of flags: I (interrupt enable), S (stack), T (sticky bit), N (negative), Z
(zero), V (overflow), C (carry).
*:
Changed as a result of instruction execution.
-:
Not changed.
Z:
Set by instruction execution.
X: Reset by instruction execution.
S
T
N
Z
V
C