
APPENDIX C
512K-BIT FLASH MEMORY
The 512K-bit flash memory features the following:
Sector configuration of 64K words x 8 bits/32K words x 16 bits (16K + 512 x 2 +
7K + 8K + 32K)
Automatic programming algorithm (Embedded Algorithm: Same as
MBM29F400TA)
Erase fault/erase restart function
Detecting the completion of write/erase by data polling or using toggle bits
Detecting the completion of write/erase using the RY and BY pins
Detecting the completion of write/erase using a CPU interrupt
Compatible with JEDEC standard commands
Erasable in units of sectors (free combination of sectors)
A minimum of 100 write/erase operations
Embedded Algorithm is a trademark of Advanced Micro Device Corporation.
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Sector Configuration
Figure C-1 shows the sector configuration of the 512K-bit flash memory. When the memory is
accessed from the CPU, SA0 to SA5 are seen in the FF bank.
Figure C-1 Sector configuration of 512K-bit flash memory
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Flash Memory Mode
When the mode pins are set to “111” for resetting, the CPU is shut down. When this occurs, the
function of the flash memory interface circuit connects the signals from ports 0, 1, 2, 3, and 4
directly to the control signals of flash memory and enables flash memory to be directly controlled
from external pins. This mode gives an image where flash memory appears as a single unit on
the external pins. The mode is mainly used when data is written or erased using the flash
memory writer. In this mode, every operation of the automatic algorithm for the 512K-bit flash
memory can be used.
A5 (16K bytes)
SA4 (512 bytes)
SA3 (512 bytes)
SA2 (7K bytes)
SA1 (8K bytes)
SA0 (32K bytes)
7FFFF h
FFFFFFh
7BFFF h
FFBFFFh
7BDFF h
FFBDFFh
Writer address
CPU address
7BBFF h
FFBBFFh
FF9FFFh
FF7FFFh
FF0000h
79FFF h
77FFF h
70000 h