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MB90560 series
CHAPTER 6 INTERRUPTS
151
I
Extended intelligent I/O service (EI
2
OS) status register (ISCS)
The ISCS is an 8-bit register. The ISCS indicates the update/fixed for the buffer address pointer
and I/O register address pointer, transfer data format (byte or word), and transfer direction.
Figure 6.6-5 shows the configuration of the ISCS.
Figure 6.6-5 Configuration of EI
2
OS status register (ISCS)
I
Buffer address pointer (BAP)
The BAP is a 24-bit register that retains the address used by EI
2
OS for the next transfer. Since
one independent BAP exists for each EI
2
OS channel, each EI
2
OS channel can transfer data
between any address in the 16-megabyte space and the I/O. If the BF bit (BAP update/fixed
selection bit in the EI
2
OS status register) in the EI
2
OS status register (ISCS) is set to "update
yes," only the lower 16 bits (BAPH, BAPL) of the BAP change; the upper 8 bits (BAPH) do not
change. Figure 6.6-6 shows the configuration of the BAP.
Initial value
EI
2
OS termination control bit
Not terminated by a request from the peripheral function.
Terminated by a request from the peripheral function
Data transfer direction specification bit
I/O register address pointer
→
buffer address pointer.
Buffer address pointer
→
I/O register address pointer
BAP update/fixed selection bit
After data transfer, the buffer address pointer is updated. (*1)
After data transfer, the buffer address pointer is not updated.
Transfer data length specification bit
Byte
Word
After data transfer, the buffer address pointer is not updated.
IOA update/fixed selection bit
After data transfer, the I/O register address pointer is updated. (*2)
Reserved bits
0 must be written to these bits.
R/W:
X:
*1
*2
Read-write
Undefined
Only the lower 16 bits of the buffer address pointer change. The buffer address pointer
can only be incremented.
The address pointer can only be incremented.