
MB90560 series
CHAPTER 9 TIMEBASE TIMER
227
Table 9.3-1 Function description of each bit in the timebase timer control register (TBTC)
Bit name
Function
bit15
RESV:
Reserved bit
<Caution>
Be sure to write “1” to this bit.
bit14
bit13
Not used
When read, the value is undefined.
Writing has no effect on operation.
bit12
TBIE:
Interrupt request
enable bit
Used to enable or disable the output of an interrupt request to the
CPU.
When this bit and the interrupt request flag bit (TBOF) are “1”, an
interrupt request is output.
bit11
TBOF:
Interrupt request flag
bit
This bit is set to 1 when the bit specifying the timebase timer
counter overflows.
When this bit and the interrupt request enable bit (TBIE) are “1”,
an interrupt request is output.
During writing, this bit is cleared with “0”. If “1“ is written, the bit
does not change and there is no effect.
<Caution>
To clear the TBOF bit, disable the timebase timer interrupt by
specifying the TBIE bit or processor status (PS) ILM bit.
The TBOF bit is cleared by writing “0”, by a transition to stop
mode, by clearing of the timebase timer with the TBR bit, or by
a reset.
bit10
TBR:
Timebase timer initial-
ization bit
Used to clear the timebase timer counter.
When “0” is written to this bit, the counter is cleared and the TBOF
bit is cleared. If “1” is written, the bit does not change and there is
no effect.
<Reference>
The read value is always “1”.
bit9
bit8
TBC1, TBC0:
Interval selection bit
Used to select an interval timer cycle.
The bit for the interval timer of the timebase timer counter is
specified.
Four types of interval can be selected.