參數(shù)資料
型號: M68HC16
廠商: Motorola, Inc.
英文描述: 16-Bit Microcontroller(16位微控制器)
中文描述: 16位微控制器(16位微控制器)
文件頁數(shù): 41/52頁
文件大?。?/td> 358K
代理商: M68HC16
AN1283/D
MOTOROLA
41
BSETW
Set Bit(s) in Word
(M : M + 1) (Mask)
M : M + 1
IND16, X
IND16, Y
IND16, Z
EXT
2709
2719
2729
2739
gggg
mmmm
gggg
mmmm
gggg
mmmm
hh ll
mmmm
rr
10
10
10
10
0
BSR
Branch to Subroutine
(PK : PC)
2
PK : PC
Push (PC)
(SK : SP) – 2
SK : SP
Push (CCR)
(SK : SP) – 2
SK : SP
(PK:PC) + Offset
PK:PC
If V = 0, branch
REL8
36
10
BVC4
Branch if Overflow
Clear
Branch if Overflow Set
REL8
B8
rr
6, 2
BVS4
CBA
CLR
If V = 1, branch
REL8
B9
rr
6, 2
Compare A to B
Clear Memory
(A) – (B)
$00
M
INH
371B
05
15
25
1705
1715
1725
1735
3705
3715
27F5
2775
27B7
2705
2715
2725
2735
48
58
68
78
1748
1758
1768
1778
2748
2758
2768
C8
D8
E8
F8
17C8
17D8
17E8
17F8
27C8
27D8
27E8
00
10
20
1700
1710
1720
1730
3700
3710
27F0
2770
2700
2710
2720
2730
ff
ff
ff
2
4
4
4
6
6
6
6
2
2
2
2
2
6
6
6
6
6
6
6
2
6
6
6
6
6
6
6
6
6
6
2
6
6
6
6
6
6
6
8
8
8
8
8
8
8
2
2
2
2
8
8
8
8
0
1
0
0
IND8, X
IND8, Y
IND8, Z
IND16, X
IND16, Y
IND16, Z
EXT
INH
INH
INH
INH
INH
IND16, X
IND16, Y
IND16, Z
EXT
IND8, X
IND8, Y
IND8, Z
IMM8
IND16, X
IND16, Y
IND16, Z
EXT
E, X
E, Y
E, Z
IND8, X
IND8, Y
IND8, Z
IMM8
IND16, X
IND16, Y
IND16, Z
EXT
E, X
E, Y
E, Z
IND8, X
IND8, Y
IND8, Z
IND16, X
IND16, Y
IND16, Z
EXT
INH
INH
INH
INH
IND16, X
IND16, Y
IND16, Z
EXT
gggg
gggg
gggg
hh ll
gggg
gggg
gggg
hh ll
ff
ff
ff
ii
gggg
gggg
gggg
hh ll
ff
ff
ff
ii
gggg
gggg
gggg
hh ll
ff
ff
ff
gggg
gggg
gggg
hh ll
gggg
gggg
gggg
hh ll
CLRA
CLRB
CLRD
CLRE
CLRM
CLRW
Clear A
Clear B
Clear D
Clear E
Clear AM
$00
A
$00
B
$0000
D
$0000
E
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
$000000000
AM[32:0]
$0000
M : M + 1
Clear Memory Word
CMPA
Compare A to Memory
(A) – (M)
CMPB
Compare B to Memory
(B) – (M)
COM
One’s Complement
$FF – (M)
M
0
1
COMA
COMB
COMD
COME
COMW
One’s Complement A
One’s Complement B
One’s Complement D
One’s Complement E
One’s Complement
Word
$FF – (A)
A
$FF – (B)
B
$FFFF – (D)
D
$FFFF – (E)
E
$FFFF – M : M + 1
M : M + 1
0
0
0
0
0
1
1
1
1
1
Table 9 CPU16 Instruction Set Summary (Sheet 5 of 15)
Mnemonic
Operation
Description
Address
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S MV H
EV
N
Z
V
C
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