參數(shù)資料
型號(hào)： M68HC16
廠商： Motorola, Inc.
英文描述： 16-Bit Microcontroller(16位微控制器)
中文描述： 16位微控制器（16位微控制器）
文件頁(yè)數(shù)： 24/52頁(yè)
文件大?。?/td> 358K
代理商： M68HC16
MOTOROLA
24
AN1283/D
4.1.11 INY
The INY instruction has been replaced by AIY. AIY adds a 20-bit value to concatenated YK and IY. The 20-
bit value is formed by sign-extending an 8-bit or 16-bit signed immediate operand.
The following code can be used to perform an INY:
AIY 1
4.1.12 PSHX
The PSHX instruction has been replaced by PSHM. PSHM stores the contents of selected registers on the
system stack. Registers are designated by setting bits in a mask byte.
The following code can be used to stack index register X:
PSHM X
The CPU16 can stack up to seven registers with a single PSHM instruction.
4.1.13 PSHY
The PSHY instruction has been replaced by PSHM. PSHM stores the contents of selected registers on the
system stack. Registers are designated by setting bits in a mask byte.
The following code can be used to stack index register Y:
PSHM Y
The CPU16 can stack up to seven registers with a single PSHM instruction.
4.1.14 PULX
The PULX instruction has been replaced by PULM. PULM restores the contents of selected registers from
the system stack. Registers are designated by setting bits in a mask byte.
The following code can be used to restore index register X:
PULM X
The CPU16 can restore up to seven registers with a single PULM instruction. As a part of normal execution,
PULM reads an extra location in memory. The extra data is discarded. A PULM from the highest available
location in memory will cause an attempt to read an unimplemented location, with unpredictable results.
4.1.15 PULY
The PULY instruction has been replaced by PULM. PULM restores the contents of selected registers from
the system stack. Registers are designated by setting bits in a mask byte.
The following code can be used to restore index register Y:
PULM Y
The CPU16 can restore up to seven registers with a single PULM instruction. As a part of normal execution,
PULM reads an extra location in memory. The extra data is discarded. A PULM from the highest available
location in memory will cause an attempt to read an unimplemented location, with unpredictable results.
4.1.16 SEC
The SEC instruction has been replaced by ORP. ORP performs inclusive OR between the content of the
condition code register and an unsigned immediate operand, then replaces the content of the CCR with the
result. The PK extension field (CCR[3:0]) is not affected.
The following code can be used to set the CCR C bit:
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