參數(shù)資料
型號： M68HC16
廠商： Motorola, Inc.
英文描述： 16-Bit Microcontroller(16位微控制器)
中文描述： 16位微控制器（16位微控制器）
文件頁數(shù)： 29/52頁
文件大小： 358K
代理商： M68HC16
AN1283/D
MOTOROLA
29
4.5 Summary of Instruction Set Differences
Table 7
provides a quick reference to differences between the CPU16 and M68HC11 CPU instruction sets.
Refer to appropriate paragraphs in the preceding sections for detailed information.
*Motorola assemblers automatically translate LSL mnemonics
Table 7 CPU16 Implementation of M68HC11 CPU Instructions
M68HC11 CPU Instruction
BHS
BLO
BSR
CLC
CLI
CLV
DES
DEX
DEY
INS
INX
INY
JMP
CPU16 Implementation
BCC
BCS
Generates a different stack frame
Replaced by ANDP
Replaced by ANDP
Replaced by ANDP
Replaced by AIS
Replaced by AIX
Replaced by AIY
Replaced by AIS
Replaced by AIX
Replaced by AIY
IND8 addressing modes replaced by IND20 and EXT modes
IND8 addressing modes replaced by IND20 and EXT modes
Generates a different stack frame
Use ASL instructions*
Replaced by PSHM
Replaced by PSHM
Replaced by PULM
Replaced by PULM
Reloads PC and CCR only
Uses two-word stack frame
Replaced by ORP
Replaced by ORP
Replaced by ORP
Replaced by LPSTOP
CPU16 CCR bits differ from M68HC11 CPU
CPU16 interrupt priority scheme differs from M68HC11
CPU16 CCR bits differ from M68HC11 CPU
CPU16 interrupt priority scheme differs from M68HC11
Adds 2 to SK : SP before transfer to XK : IX
Adds 2 to SK : SP before transfer to YK : IY
Subtracts 2 from XK : IX before transfer to SK : SP
Transfers XK field to YK field
Subtracts 2 from YK : IY before transfer to SK : SP
Transfers YK field to XK field
Waits indefinitely for interrupt or reset
Generates a different stack frame
JSR
LSL, LSLD
PSHX
PSHY
PULX
PULY
RTI
RTS
SEC
SEI
SEV
STOP
TAP
TPA
TSX
TSY
TXS
TXY
TYS
TYX
WAI
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