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參數(shù)資料
| 型號(hào)： | M68HC16 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Microcontroller(16位微控制器) |
| 中文描述： | 16位微控制器（16位微控制器） |
| 文件頁數(shù)： | 11/52頁 |
| 文件大小： | 358K |
| 代理商： | M68HC16 |
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AN1283/D
MOTOROLA
11
V — Overflow Flag
Set when two's complement overflow occurs as the result of an operation.
C — Carry Flag
Set when carry or borrow occurs during arithmetic operation. Also used during shift and rotate to facil-
itate multiple word operations.
IP[2:0] — Interrupt Priority Field
The priority value in this field (0 to 7) is used to mask interrupts.
SM — Saturate Mode Bit
When SM is set, if either EV or MV is set, data read from AM using TMER or TMET will be given max-
imum positive or negative value, depending on the state of the AM sign bit before overflow.
PK[3:0] — Program Counter Address Extension Field
This field is concatenated with the program counter to form a 20-bit address.
3.1.6 Address Extension Register and Address Extension Fields
There are six 4-bit address extension fields. EK, XK, YK, and ZK are contained by the address extension
register, PK is part of the CCR, and SK stands alone.
Extension fields are the bank portions of 20-bit concatenated bank : byte addresses used in the CPU16
pseudolinear memory management scheme.
All extension fields except EK correspond directly to a register. XK, YK, and ZK extend registers IX, IY, and
IZ; PK extends the PC; and SK extends the SP. EK holds the 4 MSB of the 20-bit address used by extended
addressing mode.
3.1.7 Multiply and Accumulate Registers
The multiply and accumulate (MAC) registers are part of a CPU submodule that performs repetitive signed
fractional multiplication and stores the cumulative result. These operations are part of control-oriented dig-
ital signal processing.
There are four MAC registers. Register H contains the 16-bit signed fractional multiplier. Register I contains
the 16-bit signed fractional multiplicand. Accumulator M is a specialized 36-bit product accumulation regis-
ter. XMSK and YMSK contain 8-bit mask values used in modulo addressing.
The CPU16 has a special subset of signal processing instructions that manipulate the MAC registers and
perform signal processing calculation.
3.2 Memory Management
The CPU16 uses bank switching to provide a 1 Megabyte address space. There are 16 banks within the
address space. Each bank is made up of 64 Kbytes addressed from $0000 to $FFFF. Banks are selected
by means of address extension fields associated with individual CPU16 registers. CPU16 addressing is
pseudolinear — a 20-bit extended address can access any byte location in the appropriate address space.
In addition, address space can be split into discrete 1 Megabyte program and data spaces by externally de-
coding the SIM function code outputs. When this technique is used, instruction fetches and reset vector
fetches access program space, while exception vector fetches (other than for reset), data accesses, and
stack accesses are made in data space.
3.2.1 Address Extension
All CPU16 resources that are used to generate addresses are effectively 20 bits wide. These resources in-
clude extended index registers, program counter, and stack pointer. All addressing modes use 20-bit ad-
dresses. 20-bit addresses are formed from a 16-bit byte address generated by an individual CPU16 register
and a 4-bit bank address contained in an associated extension field. The byte address corresponds to AD-
DR[15:0] and the bank address corresponds to ADDR[19:16].
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