參數(shù)資料
型號(hào)： M68HC16
廠商： Motorola, Inc.
英文描述： 16-Bit Microcontroller(16位微控制器)
中文描述： 16位微控制器（16位微控制器）
文件頁(yè)數(shù)： 25/52頁(yè)
文件大?。?/td> 358K
代理商： M68HC16
AN1283/D
MOTOROLA
25
ORP #$0100
The ORP instruction can set all CCR bits, except the PK extension field, at once.
4.1.17 SEI
The SEI instruction has been replaced by ORP. ORP performs inclusive OR between the content of the con-
dition code register and an unsigned immediate operand, then replaces the content of the CCR with the re-
sult. The PK extension field (CCR[3:0]) is not affected.
The following code can be used to set all the bits in the CCR IP field:
ORP #$00E0
The ORP instruction can set all CCR bits, except the PK extension field, at once.
4.1.18 SEV
The SEV instruction has been replaced by ORP. ORP performs inclusive OR between the content of the
condition code register and an unsigned immediate operand, then replaces the content of the CCR with the
result. The PK extension field (CCR[3:0]) is not affected.
The following code can be used to set the CCR V bit:
ORP #$0200
The ORP instruction can set all CCR bits, except the PK extension field, at once.
4.1.19 STOP and WAIT instructions
There are two instructions that put the M68HC11 CPU in an inactive state. Both require that either an inter-
rupt or a reset occur before normal execution of instructions resumes. The STOP instruction turns off on-
chip clocks and reduces power consumption to a minimum while retaining the contents of RAM. The WAIT
instruction suspends processing and reduces power consumption to an intermediate level.
STOP operation is controlled by the S bit in the CCR. If S = 0 when STOP is executed, the MCU goes to
stop condition. If S = 1 when STOP is executed, the STOP opcode is treated as a NOP. While the MCU is
stopped, all MCU clocks, including the crystal oscillator, are turned off, and all internal peripheral functions
stop. The MCU remains stopped until an interrupt or reset occurs. The interrupt can be an internally-gener-
ated interrupt, an external IRQ, or an XIRQ. An internal interrupt or the IRQ pin re-activate the MCU only
when the I bit in the CCR is cleared — processing resumes with the instruction that follows the STOP in-
struction. XIRQ assertion always activates the MCU, but recovery sequence depends upon X-bit state. If X
= 0, the MCU executes the stacking sequence leading to normal XIRQ interrupt service when it restarts. If
X = 1, processing restarts with the instruction that follows the STOP instruction. When a reset is used to
restart the system, a normal reset sequence is performed before processing begins.
When WAI is executed, CPU registers are stored and processing is suspended. The on-chip crystal oscil-
lator remains active. The MCU remains in wait state until an interrupt is detected. The interrupt can be an
external IRQ, an XIRQ, or any of the internally generated interrupts, such as the timer or serial interrupts.
CCR interrupt mask bits (I and X) affect interrupt recognition during wait state. Reduction of power during
wait depends on how many internal peripheral clock signals are turned off. These clocks must be turned off
by means of control bits in the appropriate peripheral system registers. The MCU free-running timer system
is shut down only if the I bit is set and the COP system is disabled. WAI does not significantly reduce analog-
to-digital converter power consumption. While in the wait state, the address/data bus repeatedly runs read
cycles to the address where the CCR contents are stacked.
The CPU16 also has two instructions that put it in an inactive state. Both require that either an interrupt or
a reset exception occur before normal execution resumes. LPSTOP minimizes microcontroller power con-
sumption. WAI idles the CPU16, but does not affect operation of other microcontroller modules. To make
certain that conditions for termination of LPSTOP and WAI are correct, interrupts are not recognized until
after the instruction following ANDP, ORP, TAP, and TDP executes. This prevents interrupt exception pro-
cessing during the period after the mask changes but before the following instruction executes.
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