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參數(shù)資料
| 型號(hào)： | M68HC16 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 16-Bit Microcontroller(16位微控制器) |
| 中文描述： | 16位微控制器（16位微控制器） |
| 文件頁數(shù)： | 27/52頁 |
| 文件大?。?/td> | 358K |
| 代理商： | M68HC16 |
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AN1283/D
MOTOROLA
27
4.2.6 SWI
The CPU16 stack frame differs from the M68HC11 CPU stack frame. The PK : PC value at the time of ex-
ecution is the first word address of SWI plus $0006. If this value were stacked, RTI would cause SWI to
execute again. In order to resume execution with the instruction following SWI, $0002 is added to the PK :
PC value prior to stacking. PSHM must be used to stack other registers during an interrupt.
4.2.7 TAP
The CPU16 CCR differs from the M68HC11 CPU CCR. The CPU16 interrupt priority scheme differs from
that of the M68HC11 CPU, and the CPU16 interrupt priority field cannot be changed by the TAP instruction.
4.2.7.1
M68HC11
CPU
Implementation:
4.2.7.2 CPU16 Implementation:
4.2.8 TPA
The CPU16 CCR and the M68HC11 CPU CCR are different. TPA cannot be used to read CPU16 interrupt
priority status. Use TPD to read the CPU16 CCR interrupt priority field.
4.2.8.1 M68HC11
CPU
Implementation:
4.2.8.2 CPU16 Implementation:
7
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