參數(shù)資料
型號： DS33ZH11
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： Ethernet Mapper
中文描述： DATACOM, NETWORK INTERFACE SUPPORT CIRCUIT, PBGA100
封裝： 10 X 10 MM, 1.41 MM HEIGHT, 0.80 MM PITCH, CSBGA-100
文件頁數(shù)： 61/169頁
文件大?。?/td> 1049K
代理商： DS33ZH11
DS33Z11 Ethernet Mapper
8.20 Hardware Mode
61 of 169
The hardware mode settings are provided for users who do not want to utilize a Microprocessor or EEPROM. The
hardware mode default queue sizes and watermark thresholds can be selected for various line rates using the
MODEC pins. The user can control the DTE/DCE, RMII/MII and Half Duplex/Full Duplex and setting with hardware
pins DCEDTES, RMIIMIIS, and FULLDS selection. The flow control (pause and back pressure) can be configured
with the AFCS hardware pins. The user can also control bit order, data scrambling, and X.86 encapsulation using
the A0, A1, and A2 pins respectively. Note that in the 100-pin CSBGA package option (DS33ZH11), three pins are
reserved for these three signals in future package revisions, but may not be included in the current version.
Contact the factory at
for more details.
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