
DS33Z11 Ethernet Mapper
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8.4 Resets And Low Power Modes
The external
RST
pin and the global reset bit in GL.CR1 create an internal global reset signal. The global reset
signal resets the status and control registers on the chip (except the GL.CR1
.
RST bit) to their default values and
resets all the other flops to their reset values. The processor bus output signals are also placed in high-impedance
mode when the
RST
pin is active (low). The global reset bit (GL.CR1
.
RST) stays set after a one is written to it, but
is reset to zero when the external
RST
pin is active or when a zero is written to it. Allow 5 milliseconds after
initiating a reset condition for the reset operation to complete.
The Serial Interface reset bit in LI.RSTPD resets all the status and control registers on the Serial interface to their
default values, except for the LI.RSTPD
.
RST bit. The Serial Interface includes the HDLC encoder/decoder, X86
encoder and decoder and the corresponding serial port. The Serial Interface reset bit (LI.RSTPD
.
RST) stays set
after a one is written to it, but is reset to zero when the global reset signal is active or when a zero is written to it.
If DS33Z11 is configured to use an external EEPROM, the DS33Z11 will provide the startup sequence to read the
device settings upon the rising edge of the external
RST
pin. When using the external EEPROM the device is
configured within 5 ms. This is dependent on an EEPROM clock of 8.33 MHz. The functional timing is provided by
Figure 10-10
.
Table 8-2 Reset Functions
RESET FUNCTION
LOCATION
COMMENTS
Hardware Device Reset
RST
Pin
Transition from a logic 0 to a logic 1
resets the device.
Hardware JTAG Reset
JTRST
Pin
Resets the JTAG test port.
Global Software Reset
GL.CR1
Writing to this bit resets the device.
Serial interface Reset
LI.RSTPD
Writing to this bit resets the Serial
Interface.
Queue Pointer Reset
GL.C1QPR
Writing to this bit resets the Queue
Pointers
There are several features in the DS33Z11 to reduce power consumption. The reset bit in the LI.RSTPD and
register also place the Serial interface in a low-power mode. Additionally, the
RST
pin may be held low indefinitely
to keep the entire device in a low-power mode. Note that exiting the low-power condition requires re-initialization
and configuration.