參數(shù)資料
型號(hào)： DS33ZH11
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： Ethernet Mapper
中文描述： DATACOM, NETWORK INTERFACE SUPPORT CIRCUIT, PBGA100
封裝： 10 X 10 MM, 1.41 MM HEIGHT, 0.80 MM PITCH, CSBGA-100
文件頁數(shù)： 17/169頁
文件大小： 1049K
代理商： DS33ZH11
DS33Z11 Ethernet Mapper
17 of 169
7 PIN DESCRIPTIONS
7.1 Pin Functional Description
Note that all digital pins are IO pins in JTAG mode. This feature increases the effectiveness of board level ATPG
patterns. JTAG pins are not available on the Hardware mode/SPI-only DS33ZH11 (10mm CSBGA)
Note:
I = Input; O = Output; Ipu = Input, with pullup; Oz = Output, with tri-state; IO = Bidirectional pin; IOz = Bidirectional pin, with tri-state
Table 7-1 Detailed Pin Descriptions
NAME
PIN #
DS33Z11
CSBGA (169)
PIN #
DS33ZH11
BGA(100)
TYPE
FUNCTION
SERIAL INTERFACE IO PINS
Serial Interface Transmit Clock Input:
The clock
reference for TSER, which is output on the rising edge of
the clock. TCLKI supports gapped clocking, up to a
maximum frequency of 52 MHz.
Transmit Serial Data Output:
Output on the rising edge
of TCLKI. Selective clock periods can be skipped for
output of TSER dependent on the TDEN settings or
gapped clock input (TCLKI). The maximum data rate is 52
Mbps.
Transmit Data Enable (Input):
The transmit data enable
is programmable to selectively block/enable the transmit
data. The TDEN signal must occur one clock edge prior to
the affected data bit. The active polarity of TDEN is
programmable in register LI.TSLCR. It is recommended
for both T1/E1 and T3/E3 applications that use gapped
clocks. The TDEN signal is provided for interfacing to
framers that do not have a gapped clock facility.
Transmit Byte Sync (Output):
This output can be used
by an external Serial to Parallel to convert TSER stream to
byte wide data. This output indicates the last bit of the byte
data sent serially on TSER. This signal is only active in the
X.86 Mode.
Note that while in Hardware mode with HDLC (non X.86)
operation, this pin must be tied high.
Serial Interface Receive Clock Input:
Reference clock
for receive serial data on RSER. Gapped clocking is
supported, up to the maximum RCLKI frequency of 52
MHz.
Receive Serial Data Input:
Receive Serial data arrives on
the rising edge of the clock.
TCLKI
F1
B1
I
TSER
F2
A2
O
TDEN/
TBSYNC
F5
—
IO
RCLKI
G2
B2
I
RSER
H1
B3
I
相關(guān)PDF資料
PDF描述
DS3803 1024K Flexible NV SRAM SIMM(1024K靈活的非易失性SRAM SIMM)
DS3903E-020 Triple 128-Position Nonvolatile Digital Potentiometer
DS3994 4-Channel Cold-Cathode Fluorescent Lamp Controller
DS4077 77.76MHz VCXO
DS4077L-0C0 77.76MHz VCXO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS33ZH11+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 10/100 ENETXPORT HMODE MAP IND RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS34 制造商:LUMILEDS 制造商全稱:LUMILEDS 功能描述:power light source Luxeon V Emitter
DS-3400D UK 制造商:TRUST 功能描述:DESKTOP WIRELESS OPTICAL TRUST
DS3404FP000 制造商:Thomas & Betts 功能描述:30A,PLG,3P4W,MG,404,3P480V
DS3404FP000/JG63 制造商:Thomas & Betts 功能描述:30A,CON,3P4W,MG,404,3P480V,JG63,SC
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*