參數(shù)資料
型號： DS33ZH11
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： Ethernet Mapper
中文描述： DATACOM, NETWORK INTERFACE SUPPORT CIRCUIT, PBGA100
封裝： 10 X 10 MM, 1.41 MM HEIGHT, 0.80 MM PITCH, CSBGA-100
文件頁數(shù)： 126/169頁
文件大小： 1049K
代理商： DS33ZH11
DS33Z11 Ethernet Mapper
Register Name:
Register Description:
Register Address:
0014h:
Bit #
Name
Default
0015h:
Bit #
Name
Default
0016h:
Bit #
Name
Default
0017h:
Bit #
Name
Default
126 of 169
SU.MACMIIA
MAC MII Management (MDIO) Address Register
0014h (indirect)
31
30
29
28
27
26
25
24
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
23
22
21
20
19
18
17
16
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
15
14
13
12
11
10
09
08
PHYA4
0
PHYA3
1
PHYA2
0
PHYA1
1
PHYA0
1
MIIA4
0
MIIA3
1
MIIA2
0
07
06
05
04
03
02
01
MIIW
0
00
MIIB
0
MIIA1
1
MIIA0
1
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Bits 11 - 15: PHY Address (PHYA[0:4])
These 5 bits select one of the 32 available PHY address locations to
access through the PHY management (MDIO) bus.
Bits 6 - 10: MII Address (MIIA[0:4]) -
These 5 bits are the address location within the PHY that is being
accessed.
Bit 1: MII Write (MIIW)
Write this bit to 1 in order to execute a write instruction over the MDIO interface. Write the
bit to zero to execute a read instruction.
Bit 0: MII Busy (MIIB)
This bit is set to 1 by the DS33Z11 during execution of a MII management instruction
through the MDIO interface, and is set to zero when the DS33Z11 has completed the instruction. The user should
read this bit and ensure that it is equal to zero prior to beginning a MDIO instruction.
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