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9-10
Debug Interface
Copyright 2000-2001 by LSI Logic Corporation. All rights reserved.
Table 9.1
Test Access Port Instruction Descriptions
Instruction
Description
EXTEST (0000)
The EXTEST instruction puts the selected scan chain and all scan cells in
test mode, and it connects the selected scan chain between TDI and TDO.
In the CAPTURE-DR state, inputs from the system logic and outputs from
the output scan cells to the system are captured by the scan cells.
In the SHIFT-DR state, previously captured test data is shifted out of the scan
chain on TDO, while new test data is shifted in through TDI. This data is
applied immediately to the system logic and system pins.
SCAN_N (0010)
This instruction connects the Scan Path Select register between TDI and
TDO.
During the CAPTURE-DR state, a fixed value of 0b10000 is loaded into the
Scan Path Select register.
During the SHIFT-DR state, the ID number of the desired scan path is shifted
into the Scan Path Select register.
In the UPDATE-DR state, the Scan register of the selected scan chain is
connected between TDI and TDO, and it remains connected until a
subsequent SCAN_N instruction is issued. On reset, scan chain 3 is selected
by default. The Scan Path Select register is 5 bits long in this implementation,
although no finite length is specified.
INTEST (1100)
The INTEST instruction puts the selected scan chain and all scan cells in test
mode, and it connects the selected scan chain between TDI and TDO.
In the CAPTURE-DR state, the output and input scan cells capture the value
of the data applied from the core logic and the system logic, respectively.
In the SHIFT-DR state, previously captured test data is shifted out of the scan
chain on TDO, while new test data is shifted in through TDI.