參數(shù)資料
型號： 82443ZX
廠商： INTEL CORP
元件分類： 存儲控制器/管理單元
英文描述： Intel㈢ 440ZX AGPset: Host Bridge/Controller
中文描述： DRAM CONTROLLER, PBGA492
封裝： BGA-492
文件頁數(shù)： 26/116頁
文件大小： 533K
代理商： 82443ZX
Register Description
3-2
82443ZX Host Bridge Datasheet
82443ZX. Registers that are marked as “Intel Reserved” must not be modified by system software.
Writes to “Intel Reserved” registers may cause system failure. Reads to “Intel Reserved” registers
may return a non-zero value. Software should not write to reserved configuration locations in the
device-specific region (above address offset 3Fh)
Upon reset, the 82443ZX sets its internal configuration registers to predetermined default states.
However, there are a few exceptions to this rule.
1. When a reset occurs during the POS/STR state, several configuration bits are not reset to their
default state. These bits are noted in the following register description.
2. Some register values at reset are determined by external strapping options.
The default state represents the minimum functionality feature set required to successfully bring up
the system. Hence, it does not represent the optimal system configuration. It is the responsibility of
the system initialization software (usually BIOS) to properly determine the DRAM configurations,
operating parameters and optional system features that are applicable, and to program the 82443ZX
registers accordingly.
3.1
I/O Mapped Registers
The 82443ZX contains three registers that reside in the CPU I/O address space
the
Configuration Address (CONFADD) Register, the Configuration Data (CONFDATA)
Register, and the Power Management Control Register. The Configuration Address
Register enables/disables the configuration space and determines what portion of
configuration space is visible through the Configuration Data window.
3.1.1
CONFADD—Configuration Address Register
I/O Address:
Default Value:
Access:
Size:
0CF8h Accessed as a Dword
00000000h
Read/Write
32 bits
CONFADD is a 32 bit register accessed only when referenced as a Dword. A Byte or Word
reference will "pass through" the Configuration Address Register onto the PCI bus as an I/O cycle.
The CONFADD register contains the Bus Number, Device Number, Function Number, and
Register Number for which a subsequent configuration access is intended.
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