
QSM
REFERENCE MANUAL
USING THE QSPI FOR ANALOG DATA AQUISITION
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MOTOROLA
A-7
A.4 Basic System Implementation
The schematic diagram shown in
Figure A-7
depicts the basic minimal serial A/D data
acquisition system. The only extraneous logic required for this system is the 2 MHz
oscillator. The oscillator can be used to supply a number of other peripheral devices
as well as additional A/D converters. Also, the oscillator can be eliminated entirely, and
an MC145051 can be used in place of the MC145050; however, the speed of the con-
versions would be reduced.
Figure A-7 Basic Serial A/D Data Acquisition System
The timing diagram (see
Figure A-8
) shows significant events on the pins of the
MC145050. This timing sequence corresponds to the timing sequence illustrated in
Figure 9 of
Reference 4.
Although not the fastest method for sampling the A/D con-
verter, this timing sequence allows efficient use of the MC145050 on a bus in conjunc-
tion with other peripherals. During A/D conversion, the QSPI can select and exchange
data with another device, maximizing overall serial bandwidth. The timing for 10-clock
transfer not using CS may be slightly faster, but if it is used with other peripherals, the
QSPI must wait for the conversion to be completed.
For successful operation, power supply decoupling and wiring should be carefully con-
sidered. The 0.1 mF decoupling capacitor should be placed as close as possible to the
V
DD
and V
SS
pins. A nearby decoupling capacitor is also needed between the V
REF
and V
AG
pins. Separate lines should be run to the V
REF
and V
AG
inputs since any cur-
+5 V
0.2 μF
+5 V
0.1 μF
11 ANALOG
INPUTS
2 MHz
OSCILLATOR
PRESSURE
VOLTAGE
TEMPERATURE
AN1
0
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
CS
SCK
DIN
DOUT
VREF
VAG
PCS3
PCS2
PCS1
PCS0
SCK
MOSI
MISO
QSM
QSPI
VSS
VDD
A/D CLK
MC68332
F
Freescale Semiconductor, Inc.
n
.