- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361324 > QSMRM QSMRM QSM Queued Serial Module Reference Manual PDF資料下載
參數(shù)資料
| 型號： | QSMRM |
| 英文描述： | QSMRM QSM Queued Serial Module Reference Manual |
| 中文描述： | QSMRM QSM排隊(duì)串行模塊參考手冊 |
| 文件頁數(shù)： | 76/112頁 |
| 文件大?。?/td> | 1496K |
| 代理商： | QSMRM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁當(dāng)前第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁
MOTOROLA
5-20
SCI SUBMODULE
QSM
REFERENCE MANUAL
Figure 5-9 Start Search Example 7
5.4.2 Receiver Functional Operation
The receiver contains a receive serial shifter and a parallel RDR. While one character
is in the process of being shifted in, another character may be held in RDR. This ca-
pability is called double buffering. The receive serial shifter cannot be accessed direct-
ly by the CPU. The input of the receive serial shifter is connected to the majority
sampling logic of the receive bit processor.
The receiver is enabled when RE in SCCR1 is set to one. When RE is zero, the receiv-
er is initialized and most of the receiver bit processor logic is disabled. The receiver bit
processor logic drives a state machine (run by the RT clock) that determines the logic
level for each bit-time. This state machine controls when the bit processor logic is to
sample the RXD pin and also controls when data is to be passed to the receive serial
shifter. Data is shifted into the receive serial shifter according to the most recent syn-
chronization of the RT clock with the incoming data stream. From this point on, the
data is moved synchronously with the MCU system clock.
The first bit shifted in is the start bit, which is always a logic zero. The next eight bits
shifted in are the basic data byte (LSB first). The next bit shifted in depends on the
mode selected by M in SCCR1. If M = 1, then the bit is the ninth data bit and is placed
in R8 of SCDR, concurrent with the transfer of data from the receive serial shifter to
register RDR.
The last bit shifted in for each frame is the stop bit, which is always a logic one. If a
logic zero is sensed during this bit-time, the FE error flag in SCSR is set. A framing
error is usually caused by mismatched baud rates between the receiver and transmit-
ter or by a significant burst of noise. Note that a framing error is not always caught; the
data in the expected stop bit-time may be a logic one regardless.
When the stop bit is received, the frame is considered to be complete, and the re-
ceived character in the receive serial shifter is transferred in parallel to RDR. If M = 1,
the ninth bit is transferred at the same time; however, if the RDRF flag in SCSR is set,
transfers are inhibited. Instead, the OR error flag is set, indicating to the user that the
CPU needs to service register RDR faster. The data in RDR is preserved, but the data
in the receive serial shifter is lost.
LSB
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
1
R
T
2
R
T
3
R
T
4
R
T
5
R
T
6
R
T
7
R
T
8
R
T
9
R
T
1
0
R
T
1
1
R
T
1
2
R
T
1
3
R
T
1
4
R
T
1
6
R
T
2
R
T
3
1
^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^
1
1
1
1
1
1
1
1
0
0
0
1
0
1
R
T
1
5
Restart RT Clock
*
*
*
*
*
*
*
*
*
*
*
PERCEIVED START BIT
^ ^ ^ ^ ^ ^
ACTUAL START BIT
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| QSOP-24 | Package MQA24 |
| QST4 | Low frequency amplifier |
| QST9 | General purpose amplification (−30V, −1A) |
| QSX7 | General purpose amplification (12V, 1.5A) |
| QSZ1 | General purpose transistor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| QSMS-0136 | 制造商:Avago Technologies 功能描述:SCHOTTKY DIODE, PART NUMBER ASSIGNED TO REPLACE HSMS-0005 - Gel-pak, waffle pack, wafer, diced wafer on film |
| QSMS-2926-TR1G | 制造商:Avago Technologies 功能描述:SCHOTTKY DIODE - Tape and Reel |
| QSMT-AW13-NSUZ1 | 制造商:Avago Technologies 功能描述:MS AV,1W CWHITE - Tape and Reel |
| QSMT-FW85-NX000 | 制造商:Avago Technologies 功能描述:THIS HIGH BRIGHTNESS LED LIGHT SOURCE |
| QSMT-L060-227NG | 制造商:Avago Technologies 功能描述:L2 LED CONTOUR LIGHTING,COLORLESS - Rail/Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。