
MOTOROLA
iv
QSM
REFERENCE MANUAL
(Continued)
Title
Paragraph
Page
TABLE OF CONTENTS
4.1.6
4.1.7
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.6.1
4.3.6.2
4.3.6.3
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.2
4.4.2.1
4.4.2.2
Programmable Queue Pointer ...........................................................4-2
Continuous Transfer Mode ................................................................4-2
Block Diagram ...........................................................................................4-3
QSPI Programmer's Model and Registers ................................................4-3
QSPI Control Register 0 (SPCR0) ....................................................4-4
QSPI Control Register 1 (SPCR1) ....................................................4-6
QSPI Control Register 2 (SPCR2) ....................................................4-8
QSPI Control Register 3 (SPCR3) ..................................................4-10
QSPI Status Register (SPSR) .........................................................4-11
QSPI RAM .......................................................................................4-12
Receive Data RAM ..................................................................4-13
Transmit Data RAM .................................................................4-14
Command RAM .......................................................................4-14
Operating Modes and Flowcharts ...........................................................4-16
Master Mode Operation ..........................................................4-24
Master Wraparound Mode ......................................................4-25
Slave Mode .....................................................................................4-26
Description of Slave Operation ...............................................4-26
Slave Wraparound Mode ........................................................4-28
SECTION 5
SCI SUBMODULE
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
5.4.2.1
5.4.2.2
Features ....................................................................................................5-1
SCI Programmer's Model and Registers ...................................................5-2
SCI Control Register 0 (SCCR0) .......................................................5-5
SCI Control Register 1 (SCCR1) .......................................................5-6
SCI Status Register (SCSR) .............................................................5-9
SCI Data Register (SCDR) ..............................................................5-12
Transmitter Operation .............................................................................5-13
Receiver Operation .................................................................................5-15
Receiver Bit Processor ....................................................................5-16
Receiver Functional Operation ........................................................5-20
Idle-Line Detect .......................................................................5-21
Receiver Wakeup ....................................................................5-22
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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