Interrupt Controller
MOTOROLA
MC68328 USER’S MANUAL 12/9/97
6-7
INTERRUPT
6
CONTROLLER
PRELIMINARY
level low. Positive polarity means that an interrupt occurs when the signal goes from logic
level low to logic level high.
0 = Negative polarity (default at reset).
1 = Positive polarity.
POL2—Polarity 2
This bit controls interrupt polarity for IRQ2. In level-sensitive mode, negative polarity means
that an interrupt occurs when the signal is at logic level low. Positive polarity means that an
interrupt occurs when the signal is at logic level high. In edge-triggered mode, negative
polarity means that an interrupt occurs when the signal goes from logic level high to logic
level low. Positive polarity means that an interrupt occurs when the signal goes from logic
level low to logic level high.
0 = Negative polarity (default at reset).
1 = Positive polarity.
POL3—Polarity 3
This bit controls interrupt polarity for IRQ3. In level-sensitive mode, negative polarity means
that an interrupt occurs when the signal is at logic level low. Positive polarity means that an
interrupt occurs when the signal is at logic level high. In edge-triggered mode, negative
polarity means that an interrupt occurs when the signal goes from logic level high to logic
level low. Positive polarity means that an interrupt occurs when the signal goes from logic
level low to logic level high.
0 = Negative polarity (default at reset).
1 = Positive polarity.
POL6—Polarity 6
This bit controls interrupt polarity for IRQ6. In level-sensitive mode, negative polarity means
that an interrupt occurs when the signal is at logic level low. Positive polarity means that an
interrupt occurs when the signal is at logic level high. In edge-triggered mode, negative
polarity means that an interrupt occurs when the signal goes from logic level high to logic
level low. Positive polarity means that an interrupt occurs when the signal goes from logic
level low to logic level high.
0 = Negative polarity (default at reset).
1 = Positive polarity.
ET1—IRQ1 Edge Trigger Select
When this bit is set, the IRQ1 signal is an edge-triggered interrupt. In edge-triggered mode,
you must write a 1 to the IRQ1 bit in the interrupt status register to clear this interrupt. When
Note: Clear your interrupts after you change modes. When you change modes from
level to edge interrupts, an edge can be created, which causes an interrupt to be
posted.