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參數(shù)資料
| 型號(hào)： | MC68328PV |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, TQFP-144 |
| 文件頁(yè)數(shù)： | 114/198頁(yè) |
| 文件大?。?/td> | 551K |
| 代理商： | MC68328PV |
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Architecture
MOTOROLA
MC68328 USER’S MANUAL 12/9/97
3-7
ARCHITECTURE
3
PRELIMINARY
3.3 PLL CLOCK SYNTHESIZER AND POWER CONTROL
The clock synthesizer can operate with either an external crystal or an external oscillator
using an internal phase-locked loop (PLL). An external clock can also be used to directly
drive the clock signal at the operational frequency.
You can save power on the DragonBall by turning off peripherals that are not being used,
reducing processor clock speed, or disabling the processor altogether. An interrupt at the
interrupt controller logic that runs during low-power mode allows you to wake up from this
mode. Programmable interrupt sources cause the system to wake up. On-chip peripherals
can initiate a wake-up from doze mode and the external interrupts and real-time clock can
wake up the core from sleep mode.
3.4 INTERRUPT CONTROLLER
The interrupt controller prioritizes internal and external interrupt requests and generates a
vector number during the CPU interrupt-acknowledge cycle. Interrupt nesting is also
provided so that an interrupt service routine of a lower priority interrupt may be suspended
by a higher priority interrupt request. The on-chip interrupt controller has the following
features:
Prioritized interrupts
Fully nested interrupt environment
Programmable vector generation
Unique vector number generated for each interrupt level
Interrupt masking
Wake-up interrupt masking
3.5 PARALLEL GENERAL-PURPOSE I/O PORTS
The DragonBall supports up to 77 general-purpose I/O ports that you can configure as
general-purpose I/O pins or dedicated peripheral interface pins. Each pin can be
independently programmed as a general-purpose I/O pin even when other pins related to
that on-chip peripheral are used as dedicated pins. If all the pins for a particular peripheral
are configured as general-purpose I/O, the peripheral will still operate normally.
3.6 TIMERS
The software watchdog timer protects against system failures by providing a way for you to
escape from unexpected input conditions, external events, or programming errors. Once
started, the software watchdog timer must be cleared by software on a regular basis so that
it never reaches its time-out value. When it does reach its time-out value, the watchdog timer
assumes that a system failure has occurred and the software watchdog logic resets or
interrupts the core.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68330FE25 | 32-BIT, 25.16 MHz, MICROPROCESSOR, PQFP132 |
| MC68330FE8V | 32-BIT, 8.39 MHz, MICROPROCESSOR, PQFP132 |
| MC68330CFE8V | 32-BIT, 8.39 MHz, MICROPROCESSOR, PQFP132 |
| MC68330FE16 | 32-BIT, 16.78 MHz, MICROPROCESSOR, PQFP132 |
| MC68332ACFV25 | 32-BIT, 25 MHz, MICROCONTROLLER, PQFP144 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68328UM | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Portable System Processor-DragonBall |
| MC68330 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
| MC68330CFE16 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
| MC68330CFE8V | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
| MC68330CFG16 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
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