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參數(shù)資料
| 型號(hào)： | MC68328PV |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, TQFP-144 |
| 文件頁(yè)數(shù)： | 120/198頁(yè) |
| 文件大小： | 551K |
| 代理商： | MC68328PV |
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MOTOROLA
MC68328 USER’S MANUAL 12/9/97
4-1
SYSTEM
CONTROL
4
PRELIMINARY
SECTION 4
SYSTEM CONTROL
The DragonBall microprocessor contains a system control register that enables the system
software to customize the following functions:
Access permission from the internal peripheral registers
Address space of the internal peripheral registers
Bus timeout control and status (bus-error generator)
4.1 OPERATION
The on-chip resources use a reserved 4,096-byte block of address space for their registers.
This block is double-mapped to two locations—0xFFFFF000 (24-bit) and 0xFFF000 (32-bit)
—at reset. The DMAP bit in the system control register disables double-mapping in a 32-bit
system. If you clear this bit, the on-chip peripheral registers appear only at the top of the 4G
address range starting at 0xFFFFF000.
The system control register allows you to control system operation functions like bus
interface and hardware watchdog protection. It contains status bits that allow exception
handler code to investigate the cause of exceptions and resets. The hardware watchdog
(bus timeout monitor) and the software watchdog timer provide system protection. The
hardware watchdog provides a bus monitor that causes a bus error when a bus cycle is not
terminated by the DTACK signal before 128 clock cycles have elapsed.
The bus error timeout logic consists of a watchdog counter that, when enabled, begins to
count clock cycles as the AS pin is asserted for internal or external bus accesses. The
negation of AS normally terminates the count, but if the count reaches terminal count before
AS is negated, BERR is asserted until AS is negated. The bus error timeout logic uses one
control bit and one status bit in the system control register. The BETO bit in the system
control register is set after a bus timeout, which could be caused by a write-protect violation.
The software watchdog timer resets the DragonBall if enabled and not cleared or disabled
before reaching terminal count. The software watchdog timer is enabled at reset. For
information about timer operation, see Section 8.3 Software Watchdog Timer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68330FE25 | 32-BIT, 25.16 MHz, MICROPROCESSOR, PQFP132 |
| MC68330FE8V | 32-BIT, 8.39 MHz, MICROPROCESSOR, PQFP132 |
| MC68330CFE8V | 32-BIT, 8.39 MHz, MICROPROCESSOR, PQFP132 |
| MC68330FE16 | 32-BIT, 16.78 MHz, MICROPROCESSOR, PQFP132 |
| MC68332ACFV25 | 32-BIT, 25 MHz, MICROCONTROLLER, PQFP144 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68328UM | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Portable System Processor-DragonBall |
| MC68330 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
| MC68330CFE16 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
| MC68330CFE8V | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
| MC68330CFG16 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated CPU32 Processor |
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