參數(shù)資料
型號(hào)： L64381
廠商： LSI Corporation
英文描述： 4-Port Ethernet Controller(四端口以太網(wǎng)控制器)
中文描述： 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器）
文件頁(yè)數(shù)： 84/109頁(yè)
文件大小： 815K
代理商： L64381
6-4
Instruction Set
Care must be taken when modifying the configuration of the L64381
while it is actively transmitting or receiving a packet on the Network
Interface or on the Bus Interface. A change in configuration can lead to
unpredictable or incorrect operation. Thus the configuration modes
should only be changed when the L64381 is either in Diagnostics Modes
1 or 3 or is idle in Diagnostic Modes 0 or 2.
6.2
Accessing the
Data FIFO
This section details the instructions that read and write the contents of
the Data FIFO. These operations are possible only in Modes 1 and 3.
6.2.1
Reading the
Data FIFO
The following steps describe how to read a location in the Data FIFO:
1.
Load the FIFO address to be read (use the Write Data FIFO Address
Register instruction).
2.
Execute the Read Data FIFO instruction.
3.
Read the least-significant halfword from Data FIFO Data Out
Register 0.
4.
Read the most-significant halfword from Data FIFO Data Out
Register 1.
5.
Read bits [15:12] of the Data FIFO Address Register (the RRAM
field), which contain bits [35:32] of the Data FIFO.
6.2.2
Writing to the
Data FIFO
The following steps describe how to write to a location in the Data FIFO:
1.
Load the FIFO address to be written (use the Write Data FIFO
Address Register instruction). At the same time, load bits [11:8] of
the Data FIFO Address Register (the WRAM field) with the desired
value in bits [35:32] of the Data FIFO.
2.
Load the least-significant halfword into Data FIFO Data In Register 0.
3.
Load the most-significant halfword into Data FIFO Data In Register 1.
4.
Execute the Write Data FIFO instruction.
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