- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377598 > L64381 (LSI Corporation) 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁(yè)數(shù)： | 53/109頁(yè) |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)當(dāng)前第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)
Status Signals
3-13
the rising edge of CLOCK during which PREADY is
driven LOW.
READ
Read
This input determines whether the operation is going to
be a write to the L64381 (READ = HIGH) or a read from
the L64381 (READ = LOW). As with ADRS[5:0], the
L64381 latches this signal when ADRS_STROBE and
CHIP_SELECT are asserted.
Input
RESET
Reset
Assertion of RESET resets the L64381. The RESET sig-
nal should be asserted for at least 1
μ
s. At the end of the
reset, the L64381 resets all register contents to zeros,
3-states all bidirectional signals, and places all outputs in
their nonasserted states.
Input
Note:
Asserting RESET sets the Enable Port x bits to
all ones to disable all the ports.
3.4
Status Signals
This section describes the signals whose status is intended to be viewed
using LEDs.
COLLOUTN
Collision Out
This pin multiplexes the Collision Status from the four
ports. It is asserted when any port detects a collision on
the Network Interface. The LEDSEL[1:0] pins and this pin
can be used along with external logic to drive LEDs.
Output
LBADN
Link Inverted
This pin is the Link Inverted Signal from one of the four
ports (a multiplexer selects which port’s LBADN signal is
output). Each port asserts LBADN when an inverted con-
nection is detected on the Network Interface. LBADN
combined with external logic can drive an LED, allowing
the status of LBADN to be viewed. LEDSEL[1:0] indicate
which port is selected.
Output
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L64388 | A General-Purpose,High-Performance Remote Access Communications Processor(通用的、高性能、遠(yuǎn)程訪問通信處理器) |
| L64704 | Satellite Decoder Which Contains A BPSK/QPSK Demodulator And A Concatenated FEC Decoder(衛(wèi)星信號(hào)譯碼器（包含BPSK/QPSK 解調(diào)器和FEC解碼器）) |
| L64724 | Satellite Receiver(衛(wèi)星信號(hào)接收器（包含BPSK/QPSK 解調(diào)器和FEC解碼器）) |
| L64734 | Tuner and Satellite Receiver Chipset |
| L64767 | SMATV（Satellite Master Antenna Television） QAM Encoder(衛(wèi)星主天線電視正交振幅調(diào)制編碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L64388 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64388 Remote Access Processor (RAP) Chip data sheet/5/98 |
| L64388VG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| L-643ED | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.37 x 4.88 x 8.6mm TOMBSTONE TYPE LED LAMP |
| L643F | 制造商:CRYDOM 制造商全稱:Crydom Inc., 功能描述:Power Modules |
| L-643GD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.37 x 4.88 x 8.6mm TOMBSTONE TYPE LED LAMP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。