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參數(shù)資料
| 型號： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁數(shù)： | 21/109頁 |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
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Configuration Registers
2-5
LOOPBK
Per Port Loopback Mode
When one of these bits is set to one, its corresponding
port operates in local loopback mode. In this mode, the
transmitter output is fed back into the receiver input, thus
allowing local testing without requiring an external
loopback connector. The following table shows the
relationship between the LOOPBK register bits and their
corresponding ports. This mode applies to full-duplex
configuration only.
[12:9]
DIAG
Mode
Description
0, 2
Normal
The L64381 is in normal operating mode
(active) as described in this document.
In this mode, the L64381 is halted. This
mode is used for reading and writing val-
ues into the FIFO Pointer Registers, the
Data FIFO, and the Statistics Counters.
This mode is provided for testing the Trans-
mit and Receive FIFO Pointer registers and
the Data FIFO and Counters. In normal
mode, it is not possible for the processor to
directly write data into the FIFO Pointer
registers or the Data FIFO.
This mode puts the FIFO address register
and the Statistics Counter address counter
into an increment mode. An initial value is
loaded into the address register, and then
the address increments itself on every read
and write operation to the FIFO or counter.
This mode is useful for testing the Data
FIFO and Statistics Counters, as well as
initializing them.
1
R/W
Register
3
FIFO and
Counter
Test
LOOPBK Bit
Port
12
11
10
9
3
2
1
0
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