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參數(shù)資料
| 型號(hào)： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁(yè)數(shù)： | 15/109頁(yè) |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
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Key Features
1-5
PKT_AVAIL signal informs system when the Receive FIFO has more
data than the programmable bus transfer size, or that an
End-of-Packet (EOP) signal is present in the Receive FIFO, so that
the FIFO data can be read by the system
BUF_AVAIL signal informs system when the Transmit FIFO has more
space than the programmable bus transfer size, so that the system
can write transmit data to the FIFO
Four BYTE_VALID signals specify which bytes are valid in the
current data word (significant only for the first and last transfer in a
packet when either the start-of-packet signal SOP or the end-of-
packet signal EOP is asserted)
SOP and EOP signals delimit start of packet and end of packet,
respectively
PORT_BUSY signal per Ethernet core when operating in full-duplex
or half-duplex mode
1.2.4
Processor
Interface
This subsection highlights the features of the L64381 processor interface:
6-bit Address and 16-bit PData buses
Slave mode device
Chip Control and Status information can be read from Control and
Status Registers
Burst mode reads of Ethernet Statistics
Interrupt signal to inform the processor if an error condition occurs
1.2.5
Key
Programmable
Features
The L64381 has several key programmable features:
Individual twisted-pair or AUI assignment per port
Automatic source address insertion
Automatic FCS insertion
Bus transfer size is configurable to 4, 8, or 16 words
Addressing modes (individual, promiscuous, or multicast)
Auto padding of packets less than 64 bytes in length
Programmable little-endian and big-endian addressing modes
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| L64388 | A General-Purpose,High-Performance Remote Access Communications Processor(通用的、高性能、遠(yuǎn)程訪問(wèn)通信處理器) |
| L64704 | Satellite Decoder Which Contains A BPSK/QPSK Demodulator And A Concatenated FEC Decoder(衛(wèi)星信號(hào)譯碼器（包含BPSK/QPSK 解調(diào)器和FEC解碼器）) |
| L64724 | Satellite Receiver(衛(wèi)星信號(hào)接收器（包含BPSK/QPSK 解調(diào)器和FEC解碼器）) |
| L64734 | Tuner and Satellite Receiver Chipset |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L64388 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64388 Remote Access Processor (RAP) Chip data sheet/5/98 |
| L64388VG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| L-643ED | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.37 x 4.88 x 8.6mm TOMBSTONE TYPE LED LAMP |
| L643F | 制造商:CRYDOM 制造商全稱:Crydom Inc., 功能描述:Power Modules |
| L-643GD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.37 x 4.88 x 8.6mm TOMBSTONE TYPE LED LAMP |
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