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參數(shù)資料
| 型號(hào)： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁(yè)數(shù)： | 27/109頁(yè) |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
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Error Registers
2-11
Note:
The user should immediately reset the write enable bits
after the address has been written. This action reduces the
likelihood of an inadvertent change of the address due to a
software bug. When the Port Mode is ON, the ports accept
all packets received on the Ethernet regardless of the value
in these registers. When the Port Mode is OFF, only those
packets that exactly match the address in these registers
are accepted.
2.4
Error Registers
The L64381 has two Error Registers, Error Register 0 and Error
Register 1. The fields within these registers indicate the status of all
errors the L64381 can detect. Upon detection of an error, the L64381
asserts the INTERRUPT output. To clear the interrupt, take the one’s
complement of the Error Register that caused the interrupt and write the
value back into that register.
2.4.1
Error Register 0
Figure 2.6 shows Error Register 0. Error Register 0 is a 16-bit read-write
register. Upon power-up or when RESET is asserted, all bits in this
register are cleared to zeros (all interrupts are disabled).
Figure 2.6
Error Register 0
R
Reserved
These bits are reserved and read as zeros.
15, 13
PINT
Processor Interface Error
A one on this bit indicates that a Processor Interface error
occurred (for example, a write to an unwritable location).
14
BINT
Bus Interface Error
A one on this bit indicates that a Bus Interface error
occurred. This error occurs when WRITE_IN_PKT and
READ_OUT_PKT are both asserted at the same time.
12
15
14
13
12
11
8 7
4 3
0
R
PINT
R
BINT
LATEC
RCFIFO
TRFIFO
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