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參數(shù)資料
| 型號： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁數(shù)： | 25/109頁 |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
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Configuration Registers
2-9
WEN
Write Enable Ethernet Address
Setting this bit to one enables writing to the six-byte Ether-
net address of the ports. The user should reset this bit as
soon as the address has been assigned in order to reduce
the chances of an accidental overwrite of the address.
0
2.2.3
Packet
Configuration
Register
Figure 2.5 shows the Packet Configuration Register. This 16-bit
read/write register contains programming information for packets and
control bits that enable and disable the ports. The information stored in
the least-significant four bits of this register are applied to all four ports
on the L64381. To override the information in these four bits with packet
specific information, set the SOPCFG bit in Configuration Register 1 to
one. The most-significant four bits of this register enable the individual
ports (1 = Enabled). In the disabled state, the ports will not respond to
any internal or external stimuli.
Figure 2.5
Packet Configuration
Register
ENPORTx
Enable Port x
When one of these bits is set, the associated port is
enabled and it functions as specified in Configuration
Registers 0 and 1. When one of these bits is reset, the
associated port is reset (disabled), the associated port’s
outputs are negated, and the Head and Tail Pointers and
EOP counters are reset to zeros. This field can only be
written if the WEP bit in Configuration Register 1 is set
to one.
[15:12]
LFORCEPPORTx
Link Force Port x
When one of these bits is set, the associated port allows
a transmit even if the link integrity fails. Refer to
Chapter 2, “Signal Descriptions,” in the Compacted and
Scalable Dedicated Ethernet (CASCADE) Core Technical
Manual for a description of the LFORCEP signal.
[11:8]
15
12 11
8 7
4
3
2
1
0
ENPORTx
LFORCEPPORTx
LCORPPORTx
S64
PAD
R
AUTO
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