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參數(shù)資料
| 型號(hào)： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁數(shù)： | 50/109頁 |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
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3-10
Signal Descriptions
1110
2
, 1100
2
, 1000
2
, or 0000
2
. For receiving PKT with
EOP asserted and dribbling bits, the L64381 asserts both
BYTE_VALID[3:0] as 1111
2
and ABORT_OUT to signal
an error condition.
If an invalid combination is encountered and the packet
has already started transmission on the network, then the
L64381 aborts the packet on the network (after transmit-
ting 32 alternating ones and zeros). If the entire packet is
in the FIFO then it is flushed from the FIFO without being
transmitted to the network. If the entire packet is not in
the FIFO, then the L64381 asserts ABORT_OUT, and the
system is expected to drop the packet externally and con-
tinue with a new packet. If the system continues to write
the current packet, then the L64381 ignores it until the
next SOP.
DATA[31:0]
L64381 Data
This bus is the data interface to and from the L64381.
Bidirectional
EOP
End of Packet
Assertion of EOP indicates the End Of Packet when it
occurs in the current word that is being placed on the Bus
Interface.
Bidirectional
PKT_AVAIL
Packet Available
The L64381 asserts PKT_AVAIL in response to the
assertion of STROBE when the Receiver FIFO has
enough data to transfer on the Bus Interface. The FIFO
is deemed to have enough data if it either:
Contains data that is equal to or more than the num-
ber of words specified in the Bus Transfer Size field
(BUS) of Configuration Register 1
Contains an End of Packet
This signal is valid on the four cycles following the asser-
tion of STROBE. The state of this signal on the four
cycles following the assertion of STROBE indicates the
Receiver FIFO space availability for Ports [3:0], respec-
tively. If at the time of assertion of the STROBE, a bus
transfer is occurring, then PKT_AVAIL is not asserted for
that particular port, but it continues to indicate the correct
status of the other ports.
Output
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