參數(shù)資料
型號: L64381
廠商: LSI Corporation
英文描述: 4-Port Ethernet Controller(四端口以太網(wǎng)控制器)
中文描述: 4端口以太網(wǎng)控制器(四端口以太網(wǎng)控制器)
文件頁數(shù): 56/109頁
文件大?。?/td> 815K
代理商: L64381
3-16
Signal Descriptions
3.7
Miscellaneous
Signals
This section describes the remaining signals in the L64381.
LP1
Phase Detector Output
LP1 is the output of the phase detector, which is embed-
ded within the on-chip PLL.
Output
LP2
VCO Input
LP2 is the input to the voltage-controlled oscillator (VCO).
Input
PLLAGND
Phased-Locked Loop Analog Ground
This output is the analog ground for the phased locked
loop.
Output
PLLVDD
Phased-Locked Loop Power
This input provides the power to the phased locked loop.
Input
PLLVSS
Phased-Locked Loop Digital Ground
This input is the digital ground for the phased locked loop.
Input
VDD
Power
The VDD inputs are the +5 V power pins. All VDD inputs
can be connected to a single supply. However, to mini-
mize EMI and digital noise coupling, the L64381 provides
individual VDD inputs for Ports [3:0]. Refer to Section 7.3,
“Special VDD and VSS Connections,” for the pin assign-
ments of these power pins.
Input
VSS
Ground
The VSS inputs are the ground pins. All VSS inputs can
be tied together. However, to minimize EMI and digital
noise coupling, the L64381 provides individual VSS
inputs for Ports [3:0]. Refer to Section 7.3, “Special VDD
and VSS Connections,” for the pin assignments of these
ground pins.
Input
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