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參數(shù)資料
| 型號： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁數(shù)： | 28/109頁 |
| 文件大?。?/td> | 815K |
| 代理商： | L64381 |
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2-12
Registers
LATEC
PORT x Late Collision Error
A one on any of the bits in this field indicates that a Late
Collision error occurred for the specific port. Each bit in
this field corresponds to one of the four ports. The
least-significant bit corresponds to Port 0; the most-
significant bit corresponds to Port 3.
[11:8]
RCFIFO
PORT x Receive FIFO Overrun Error
A one on any of the bits in this field indicates that a
Receive FIFO Overrun error occurred for the specific
port. Each bit in this field corresponds to one of the four
ports. The least-significant bit corresponds to Port 0; the
most-significant bit corresponds to Port 3.
[7:4]
TRFIFO
PORT x Transmit FIFO Underrun Error
A one on any of the bits in this field indicates that a
Transmit FIFO Underrun error occurred for the specific
port. Each bit in this field corresponds to one of the four
ports. The least-significant bit corresponds to Port 0; the
most-significant bit corresponds to Port 3.
[3:0]
2.4.2
Error Register 1
Figure 2.7 shows Error Register 1. Error Register 1 is a 16-bit read/write
register. Upon power-up or when RESET is asserted, all bits in this
register will be zeros (all interrupts are disabled). Each active field in
Error Register 1 contains four bits. Each bit corresponds to one of the
four ports. The least-significant bit corresponds to Port 0; the most-
significant bit corresponds to Port 3.
Figure 2.7
Error Register 1
R
Reserved
These bits are reserved and read as zeros.
[15:12]
TSQE
Transmit SQE Error Port x
A one on any of these bits indicates that an SQE error
occurred for the specific port.
[11:8]
15
12 11
8 7
4 3
0
R
TSQE
EXCCOL
LINKFL
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