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參數(shù)資料
| 型號： | L64381 |
| 廠商： | LSI Corporation |
| 英文描述： | 4-Port Ethernet Controller(四端口以太網(wǎng)控制器) |
| 中文描述： | 4端口以太網(wǎng)控制器（四端口以太網(wǎng)控制器） |
| 文件頁數(shù)： | 26/109頁 |
| 文件大小： | 815K |
| 代理商： | L64381 |
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2-10
Registers
LCORPPORTx Link Correct Polarity Port x
When one of these bits is set, the associated port cor-
rects for inverted polarity on the twisted-pair interface, if
an inverted polarity condition exists on that port. Refer to
Chapter 2, “Signal Descriptions,” in the Compacted and
Scalable Dedicated Ethernet (CASCADE) Core Technical
Manual for a description of the LCORPP signal.
[7:4]
S64
Store First 64 Bytes
When this bit is set, each port’s Transmit FIFO stores the
first 64 bytes of a packet until all bytes have been
transmitted without collisions on the Network Interface.
Once the first 64 bytes are transmitted, the FIFO releases
the locations that were used to store these bytes, thereby
allowing new data to be fetched into the FIFO. This fea-
ture allows the port to retransmit the packet without
requiring extra transfers on the Bus Interface. This bit is
valid only when the SOPCFG bit is zero.
3
PAD
Automatic Packet Padding
When this bit is set, the ports automatically pad a runt
packet to a length of 64 bytes. This feature allows better
utilization of the Transmit FIFO space, because all runt
packets do not need to be pre-padded to the minimum
Ethernet packet size. This bit has effect only when
AI_FCS_IN is asserted and the SOPCFG bit is zero, or
else the L64381 ignores this bit.
2
R
Reserved
This bit is reserved and reads as zero.
1
AUTO
Auto Insert Source Address
When this bit is set, the ports automatically insert the
address stored in the Ethernet Address Registers into the
source address field of the Ethernet packet. This bit is
valid only when the SOPCFG bit is zero.
0
2.3
Ethernet
Address
Registers
The three Ethernet Address Registers (0 through 2) contain the 48-bit
Ethernet address assigned to the L64381. Ethernet Address Register 0
contains the least-significant bytes of the Ethernet port address, and
Ethernet Register 2 contains the most-significant bytes of the Ethernet
address. These registers can be written only when the WEN bit in
Configuration Register 1 is set to one.
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