參數(shù)資料
型號(hào)： IDT88K8483BRI
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 7/162頁
文件大?。?/td> 0K
描述： IC SPI-4 EXCHANGE 3PORT 672-BGA
標(biāo)準(zhǔn)包裝： 24
系列： *
其它名稱： 88K8483BRI
104 of 162
October 20, 2006
IDT IDT88K8483
Indirect Registers Description
Note: (1) All indirect registers are 32 bits wide.
(2) Treat unused bits as reserved bits.
(3) A READ to unused/reserved bits returns 0 while a WRITE is ignored.
Clock Registers
MCLK Divider Sticky Register
Clock Control Input Status Register
Field
Read /
Write
Bits
Length Reset
State
Description
N
R/W
0:0-0:1
2
11
Selects the frequency of the MCLK.
00: F/2.
01: F/3.
10: F/4.
11: F/5.
Note: (1) “Sticky” means that the register value does not change during software reset.
(2) MCLK is generated by the clock generator type M and is used for generic interface, the PFP block and the PMON
block.Please
Table 52
MCLK Divider Sticky Register (Block Base=0x0a00, Register Offset=0x00)
Field
Read /
Write
Bits
Length Reset
State
Description
DIV_FOUR
R
0:0
1
Pin input
Reflects the state of the external configuration signal DIV4. This signal selects the
prescaler frequency to divide by 1 or 4.
0: Configures the prescaler frequency to divide by 1. Full rate.
1: Configures the prescaler frequency to divide by 4. Quarter rate.
CK_SEL_A
R
0:1
1
Pin input
Reflects the value of the external configuration signal SPI4A_CLK_SEL. This signal
configures the divider1 frequency to divide by 2 or 8.
0: Divide by 2.
1: Divide by 8.
CK_SEL_B
R
0:2
1
Pin input
Reflects the value of the external configuration signal SPI4B_CLK_SEL. This signal
configures the divider1 frequency to divide by 2 or 8.
0: Divide by 2.
1: Divide by 8.
CK_SEL_M
R
0:3
1
Pin input
Reflects the value of the external configuration signal SPI4M_CLK_SEL. This signal
configures the divider1 frequency to divide by 2 or 8.
0: Divide by 2.
1: Divide by 8.
Table 53
Clock Control Input Status Register (Block Base=0x0a00, Register Offset=0x01)
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IDT88P8342BHGI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:是 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
IDT88P8342BHI 功能描述:IC SPI3-SPI4 EXCHANGE 820-PBGA RoHS:否 類別:集成電路 (IC) >> 專用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
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