參數(shù)資料
型號: IDT88K8483BRI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 156/162頁
文件大?。?/td> 0K
描述: IC SPI-4 EXCHANGE 3PORT 672-BGA
標準包裝: 24
系列: *
其它名稱: 88K8483BRI
93 of 162
October 20, 2006
IDT IDT88K8483
External Microprocessor Registers
Microprocessor Indirect Access Control Register
Microprocessor Indirect Access Data Register - 1
Field
Read /
Write
Bits
Length Reset
State
Description
ERROR
R
0:0 - 0:5
6
0
Indicates the error code of a READ or WRITE operation.
0: No error.Operation performed successfully
Error code- see Table 28 below for description of error codes.
RWN
R/W
0:6
1
0
Indicates the initiation of a read or write operation by the OBC.
0: A write operation is initiated by the OBC.
1: A read operation is initiated by the OBC.
BUSY
R
0:7
1
0
Gives a busy indication if an indirect READ or WRITE is initiated. The flag is set until
the operation is completed.
0: Not busy.
1: Busy indication.
Table 27 Microprocessor Indirect Access Control Register
(Register Offset=0x1A)
Error Code
Error
1
Reconfiguration attempted without device reset, configuration is allowed only once after
reset for this register
2
Multiple LPs mapped to the same LID
3
Multiple LIDs mapped to the same LP
4
Buffer segment assigned exceeds total available segments
5
Buffer segment assigned exceeds total number of queue entries available
6
Configuration modified while link active
7
Undefined address
8
Channel limit exceeded
9 to 0x3C
Reserved
0x3D
Version mismatch
0x3E
Protected register
0x3F
Internal timeout
Table 28 Microprocessor Indirect Access Error Codes
Field
Read /
Write
Bits
Length Reset
State
Description
DATA[0:7]
R/W
0:0 - 0:7
8
0
This register contains the first byte of the 4 byte data that is to be written to or read
from the indirect register.
Table 29 Microprocessor Indirect Access Data Register -1
(Register Offset=0x1B)
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