Indirect Write Access Operation" />
參數(shù)資料
型號： IDT88K8483BRI
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 140/162頁
文件大小： 0K
描述： IC SPI-4 EXCHANGE 3PORT 672-BGA
標準包裝： 24
系列： *
其它名稱： 88K8483BRI
79 of 162
October 20, 2006
IDT IDT88K8483
Indirect Read and Write Operation:
◆
Indirect Write Access Operation
– The OBC reads the BUSY flag in the Microprocessor Indirect Access Control Register (p. 93). It proceeds only when the flag is cleared.
– The indirect WRITE access operation is triggered by a write operation in the indirect access control register. This is achieved by setting field
– The process sets the BUSY flag in the indirect access control register immediately and verifies the indirect address.
– When the address is out of bounds, no internal memory is accessed and the BUSY flag is cleared.
– When the address is within bounds the indirect write operation is achieved as soon as possible.
– The BUSY flag is cleared as soon as the Write operation is completed and the address is auto incriminated
– The ERROR field in the Microprocessor Indirect Access Control Register (p. 93) indicates an errorcode.Correct operation returns ERROR =
0.
Figure 45 Indirect access module
◆
Indirect Read Access Operation
– The indirect READ access operation is triggered by a read operation to the indirect access control register. This is achieved by setting field
– The process sets the BUSY flag in the indirect access control register immediately and verifies the indirect address.
– When the address is out of bounds, no internal memory is accessed and the BUSY flag is cleared. Also the indirect access data regis-
ters(p.85) are cleared.
– When the address is within bounds the indirect read operation is achieved as soon as possible.
– The BUSY flag is cleared as soon as the Read operation is completed and the address is automatically incremented.
– The ERROR field in the Microprocessor Indirect Access Control Register (p. 93) indicates an error code. Correct operations return ERROR
= 0.
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