參數(shù)資料
型號： IDT88K8483BRI
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 102/162頁
文件大?。?/td> 0K
描述： IC SPI-4 EXCHANGE 3PORT 672-BGA
標(biāo)準(zhǔn)包裝： 24
系列： *
其它名稱： 88K8483BRI
44 of 162
October 20, 2006
IDT IDT88K8483
Figure 16 SPI-4 Ingress State Machine
The bus word may be payload data word, payload control word, idle control word or training word. It is classified by the CTL input signal and the
content of the control field.
The DIP fields of the control word previous and subsequent payload data or training data are subjected to DIP checking. DIP checking is performed
both in IN_SYNCH and OUT_OF_SYNCH state. In IN_SYNCH state, each DIP error generates a DIP-4 error event. This event is captured and
forward to PMON.
The logical port information is carried in the payload control word. The following data words are associated with this logical port. The LP to LID
mapping is defined by the SPI-4 Ingress LP to LID Mapping Table (p. 105). Transfers for inactive LPs are flushed, and an ingress inactive logical port
event generates. The event and the associated logical port are forwarded to PMON. For each active logical port, data word, SOP, EOP, abort tag and
length are put into associated ingress port buffer. For statistics purpose, the number of transfers and bytes are forwarded to PMON.
Multiple logical ports can not be mapped to the same LID. The logical port can not remapped in the IN_SYNCH state.
Errors handling scheme:
When a DIP4 error is received in the in IN_SYNCH state, a DIP4 error event is generated and an error tag is added to the packets being received.
When a reserved control word is received, a bus error event is generated and the control word is ignored.
When consecutive payload control words are received, a bus error event is generated and every control word is ignored except the last received.
When payload is received following an idle control word, a bus error event is generated.
When a transfer belonging to an inactive LP is received, an inactive transfer event is generated and the transfer is dropped.
When an unaligned transfer is received, a bus error event is generated.
SPI-4 Ingress Associated Status Channel
Status Generation
The device supports both LVTTL and LVDS status channel mode. The status mode (LVDS/LVTTL) is configured by LVDSSTA (SPI4A_LVDSSTA,
SPI4B_LVDSSTA and SPI4M_LVDSSTA) pin. The level of the LVDSSTA pin is reflected by LVDS_STA field in the SPI-4 Ingress Status Register
When the device is in LVTTL status mode, and if ingress data channel is out of sync, it sends all ‘11’. When the device is in LVDS status mode, and
if ingress data channel is out of sync, it sends training pattern. When the device is in sync, it sends calendar frame or period training. They are
switched at the frame boundary.
The device supports one or two sets of calendars. If I_CSW_EN field in the SPI4 Ingress Calendar Switch Control Register (p. 109) is set to 1,
then two sets of calendars are used. In this mode, a calendar selection word must be received immediately after the framing word for correct opera-
tion.
If CAL_SEL field in the SPI4 Ingress Calendar Switch Control Register (p. 109) is cleared to 0, then the device selects calendar 0 and the selec-
tion word is fixed to 01b. If CAL_SEL field in the SPI4 Ingress Calendar Switch Control Register (p. 109) is set to 1, then the device selects calendar
1, and the calendar selection word is fixed to 10b.
IN_SYNCH
OUT_OF_SYNCH
A= A number of consecutive DIP-4 error or reset or interface
disabled or a number of consecutive training pattern received
B= A number of consecutive DIP-4 error free
A
B
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