參數(shù)資料
型號: IDT88K8483BRI
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 19/162頁
文件大?。?/td> 0K
描述: IC SPI-4 EXCHANGE 3PORT 672-BGA
標準包裝: 24
系列: *
其它名稱: 88K8483BRI
115 of 162
October 20, 2006
IDT IDT88K8483
SPI-4 Egress Status Register
SPI-4 Egress Diagnostics Register
SPI-4 Egress Automatic Alignment Control Register
Field
Read /
Write
Bits
Length Reset
State
Description
E_SYNCV
R
0:0
1
0
Describes the synchronization state of the egress status channel state machine.
0:SPI-4 egress status channel is out of synchronization.
1:SPI-4 egress status channel is in synchronization.
E_DSK_OOR
R
0:1
1
0
Indicates the state of the de-skew block in the egress status path.Refer to Figure 17
for de-skew overview.
0:SPI-4 egress status path de-skew is within range.
1:SPI-4 egress status path de-skew is out of range.
SCLK_AV
R
0:2
1
0
Describes the availability state of the SPI-4 egress status channel clock.This field is
cleared if there is no status clock available on LVDS or LVTTL input on a 2048
MCLK hopping window.
0:SPI-4 egress status channel clock not available.
1:SPI-4 egress status channel clock is available.
Table 79
SPI-4 Egress Status Register (Block Base=0x0800, Register Offset=0x05)
Field
Read /
Write
Bits
Length Reset
State
Description
E_FORCE_TRAIN
R/W
0:0
1
0
This field is used to force continuous training on the SPI-4 egress datapath.
0:Normal datapath operation.
1:Force continuous training on the SPI-4 egress datapath.
E_ERR_INS
R/W
0:1
1
0
Inserts consecutive DIP-4 error on egress datapath based on the number
programmed in the E_DIP_NUM field. After the DIP-4 errors are inserted, the
E_ERR_INS field will clear itself.
0: Normal datapath operation.
1: Insert DIP-4 error on the SPI-4 egress datapath.
E_DIP_NUM
R/W
0:2-0:5
4
0
This field is used to program the number of DIP-4 errors to be inserted when the
field E_ERR_INS is set to ‘1’. This number should be less than 16.
BIT_DELAY
R/W
0:6-0:7
2
0
The BIT_DELAY field is used to delay SPI-4 egress data bit line 0 by the number of
bits programmed into the BIT_DELAY field. This may be used for diagnostics.
Note: The purpose of the data path training sequence is for the deskew of data and clock signals and for the alignment between the 16 data signals.
Table 80
SPI-4 Egress Diagnostics Register (Block Base=0x0800, Register Offset=0x06)
Field
Read /
Write
Bits
Length Reset
State
Description
AUTO_ALIGN
R/W
0:0
1
0
This field enables or disables automatic alignment for the incoming LVDS data bits
in the status path.This register is used for test purposes.
0:Auto alignment is disabled.
1: Alignment is automatic.
Table 81 SPI-4 Egress Automatic Alignment Control Register (Block Base=0x0800, Register Offset=0x07)
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