
IBM2520L8767
IBM Processor for ATM Resources
atmrm.chapt03.01
08/27/99
Packet Header
Page 37 of 553
cell_loss_priority
This bit is used on both transmit and receive:
txIIf this bit is set, the cell loss priority bit in the ATM cell header will be set for each cell in this packet
rxThis bit contains theOR’d cell loss priority bits across all the cells that comprised this packet if this LCD is
using AAL5.
buffer_offset
This field contains the offset into the buffer where the data starts.
buffer_length
This field contains the length of the packet.
lc_address
This is the address of the logical connection descriptor that this packet was received on.
rx_atm_header
On reception, the four-byte ATM header (no HEC) is copied from the first and last cell into this area.
AAL5_user_byte2 (tx)
This field contains the value to be sent in the user bytes in the last cell of an AAL5 packet if INTST is configured
for two-user byte.
AAL5_user_byte2 (rx)
This field contains the second AAL5 user byte in the last cell of an AAL5 packet if INTST is configured for
two-user byte.
bit16 rx_label
This field is written with "RA" in ASCII (0x5241) to signal that this buffer was used by RAALL.
bit4 reserved
This field is always zero
bit1 routed_status
This bit is set if this packet or cell was internally routed.
bit1 toobig_status
Indicates the current packet exceeded the maximum packet size.
bit1 memchk_status
Indicates the current packet had a memory check (real size exceeded or virtual error).
bit1 fabort_status
Indicates the current packet was aborted (AAL5 forward abort).
bit1 badlen_status
Indicates the current packet had a bad AAL5 length in the trailer.
bit1 badcpi_status
Indicates the current packet had a bad AAL5 CPI field (not zero).
bit1 badcrc_status
Indicates the current packet had a bad AAL5 CRC.
bit1 timout_status
Indicates the current packet had a reassembly timeout error.
bit1 fifopk_status
Indicates the current packet is a FIFO packet (see MPEG FIFO mode).
bit1 congestion_status This bit is written when the packet is completed. It contains the OR’d congestion bit across an AAL5 packet.
bit1 route_status
This bit is written when the packet is completed if it is internally routed.
bit1 error_status
This bit is written when the packet is completed if an error condition occurs.
bit1 done_status
This bit is written when the packet is completed. It can be used when thresholding.
host_data
If host data is enabled in RAALL, then the 32/24 bits of host data is read from the LCD and written to this area
for each packet. The size is based on how many user bytes are used.
cut_thru_addr
This field is only used in one of the cut-through modes and has two purposes. When the packet is first received,
the packet address is written to this field. This information can then be used by software to do a further
cut-through operation or free the packet. When a cut-through operation is performed, and the packet is not com-
plete yet, the descriptor address is placed in this field .
When in scatter mode, the low-order bits specify how many pages are in the DMA list that follows the packet
header.
dma_desc_addr
If the dma_on_xmit bit is set in the packet header, this field contains the address of the DMA descriptor that will
be queued when transmission is complete.
Transmit and Receive Packet Header Field Descriptions
(Page 2 of 2)
Field Name
Field Description