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參數(shù)資料
| 型號(hào)： | ARM7TDMI-S |
| 英文描述： | ARM7TDMI-S Microprocessor Core preliminary technical manual 5/00 |
| 中文描述： | 的ARM7TDMI - S微處理器核的初步技術(shù)手冊(cè)5 / 00 |
| 文件頁(yè)數(shù)： | 65/184頁(yè) |
| 文件大?。?/td> | 1147K |
| 代理商： | ARM7TDMI-S |
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Exceptions
Rev. A
3-15
Copyright 2000 by LSI Logic Corporation. All rights reserved.
3.6.5.2 Data Abort
When a data abort occurs, the action taken depends on the instruction
type:
1.
Single data transfer instructions (
LDR
,
STR
) write back modified base
registers: the Abort handler must be aware of this.
2.
The swap instruction (
SWP
) is aborted as though it had not been
executed. The abort must occur on the read access of the
SWP
instruction.
3.
Block data transfer instructions (
LDM
,
STM
) complete. When write back
is set, the base is updated. If the instruction would have overwritten
the base with data (it has the base in the transfer list), the
ARM7TDMI-S prevents the overwriting. All register overwriting is
prevented after an abort is indicated, which means that the
ARM7TDMI-S always preserves R15 (always the last register to be
transferred) in an aborted
LDM
instruction.
The abort mechanism allows the implementation of a demand paged
virtual memory system. In such a system the processor is allowed to
generate arbitrary addresses. When the data at an address is
unavailable, the Memory Management Unit (MMU) signals an abort. The
abort handler must then work out the cause of the abort, make the
requested data available, and retry the aborted instruction. The
application program needs no knowledge of the amount of memory
available to it, nor is its state in any way affected by the abort.
After fixing the reason for the abort, the handler must execute the
following return instruction irrespective of the state (ARM or Thumb) at
the point of entry:
SUBS PC,R14_abt,#8
This action restores both the PC and the CPSR, and retries the aborted
instruction.
3.6.6 Software Interrupt (SWI)
The software interrupt instruction (
SWI
) is used to enter Supervisor mode,
usually to request a particular supervisor function. An SWI handler
returns by executing the following instruction, irrespective of the state
(ARM or Thumb):
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