
B-36
Detailed Debug Operation
Rev. A
Copyright 2000 by LSI Logic Corporation. All rights reserved.
Av[31:0] is the value in the Address Value Register
Am[31:0] is the value in the Address Mask Register
A[31:0] is the address bus from the ARM7TDMI S
Dv[31:0] is the value in the Data Value Register
Dm[31:0] is the value in the Data Mask Register
D[31:0] is the data bus from the ARM7TDMI S
Cv[8:0] is the value in the Control Value Register
Cm[7:0] is the value in the Control Mask Register
C[9:0] is the combined control bus from the ARM7TDMI-S core, other
watchpoint registers, and the DBGEXT signal.
The CHAINOUT signal is derived as follows:
CHAINOUT = ((({D v [31:0],C v [6:4]} XNOR {D[31:0],C[7:5]}) OR
{D m [31:0],C m [7:5]}) == 0x7FFFFFFFF)
The CHAINOUT output of watchpoint register 1 provides the CHAIN
input to Watchpoint 0. This CHAIN input allows for quite complicated
configurations of breakpoints and watchpoints.
Note:
There is no CHAIN input to Watchpoint 1 and no CHAIN
output from Watchpoint 0.
Take, for example, the request by a debugger to breakpoint on the
instruction at location YYY when running process XXX in a multiprocess
system. If the current process ID is stored in memory, you can implement
the above function with a watchpoint and breakpoint chained together.
The watchpoint address points to a known memory location containing
the current process ID, the watchpoint data points to the required
process ID, and the ENABLE bit is set to off.
The address comparator output of the watchpoint drives the write enable
for the CHAINOUT latch. The input to the latch is the output of the data
comparator from the same watchpoint. The output of the latch drives the
CHAIN input of the breakpoint comparator. The address YYY is stored in
the breakpoint register. When the CHAIN input is asserted, the
breakpoint address matches, and the breakpoint triggers correctly.