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參數(shù)資料
| 型號(hào)： | ARM7TDMI-S |
| 英文描述： | ARM7TDMI-S Microprocessor Core preliminary technical manual 5/00 |
| 中文描述： | 的ARM7TDMI - S微處理器核的初步技術(shù)手冊(cè)5 / 00 |
| 文件頁(yè)數(shù)： | 120/184頁(yè) |
| 文件大?。?/td> | 1147K |
| 代理商： | ARM7TDMI-S |
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7-8
Instruction Cycle Timing
Rev. A
Copyright 2000 by LSI Logic Corporation. All rights reserved.
7.3.4 Data Operations
A data operation executes in a single data path cycle except where the
shift is determined by the contents of a register. The ARM7TDMI-S core
reads a first register onto the A bus, and a second register, or the
immediate field, onto the B bus.
The ALU combines the A bus source and the shifted B bus source
according to the operation specified in the instruction. The
ARM7TDMI-S core writes the result (when required) into the destination
register. (Compares and tests do not produce results, only the ALU
status flags are affected.)
An instruction prefetch occurs at the same time as the data operation,
and the PC is incremented.
When a register specifies the shift length, an additional data path cycle
occurs before the data operation to copy the bottom eight bits of that
register into a holding latch in the barrel shifter. The instruction prefetch
occurs during this first cycle. The operation cycle is internal (it does not
request memory). As the address remains stable through both cycles,
the memory manager can merge this internal cycle with the following
sequential access.
The PC may be one or more of the register operands. When the PC is
the destination, external bus activity may be affected. When the
ARM7TDMI-S core writes the result to the PC, the contents of the
instruction pipeline are invalidated, and the ARM7TDMI-S core takes the
address for the next instruction prefetch from the ALU rather than the
address incrementer. The ARM7TDMI-S core refills the instruction
pipeline before any further execution takes place. During this time
exceptions are locked out.
PSR transfer operations exhibit the same timing characteristics as the
data operations except that the PC is never used as a source or
destination register.
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