
S5335 – PCI Bus Controller, 3.3V
Revision 5.01 – November 30, 2005
Data Sheet
AMCC Confidential and Proprietary
DS1657 36
Class Code Register (CLCD)
This 24-bit, read-only register is divided into three one-
byte fields: the base class resides at location 0Bh, the
sub-class at 0Ah, and the programming interface at
09h. The default setting for the base class is all ones
(FFh), which indicates that the device does not fit into
the thirteen base classes defined in the PCI Local Bus
Specification. It is possible, however, through use of
the external non-volatile memory, to implement one of
the defined class codes described in Table 22 below.
For devices that fall within the seven defined class
codes, sub-classes are also assigned. Tables 23
through 35 describe each of the sub-class codes for
base codes 00h through 0Ch, respectively.
Figure 12. Class Code Register
Register Name:
Class Code
Address Offset:
09h-0Bh
Power-up value:
FF0000h
Boot-load:
External nvRAM offset 049h-4Bh
Attribute:
Read Only
Size:
24 bits
Table 22. Defined Base Class Codes
Base-Class
Description
00h
Early, pre-2.0 PCI specification devices
01h
Mass storage controller
02h
Network controller
03h
Display controller
04h
Multimedia device
05h
Memory controller
06h
Bridge device
07h
Simple communication controller
08h
Base system peripherals
09h
Input devices
0Ah
Docking stations
0Bh
Processors
0Ch
Serial bus controllers
0D-FEh
Reserved
FFh
Device does not fit defined class codes (default)
7
0
Sub-Class
7
0
7
0
Base Class
Prog I/F
(Bit)
(Offset)
@09h
@0Ah
@0Bh