
Rev. 1.00 Mar. 02, 2006 Page xxxvi of xl
Table 5.4
Interrupt Sources, Vector Addresses, and Interrupt Priorities
(H8S/2140B Group Compatible Vector Mode) ...................................................... 96
Table 5.5
Interrupt Sources, Vector Addresses, and Interrupt Priorities
(Extended Vector Mode) ...................................................................................... 100
Table 5.6
Interrupt Control Modes ....................................................................................... 104
Table 5.7
Interrupts Selected in Each Interrupt Control Mode ............................................. 105
Table 5.8
Operations and Control Signal Functions in Each Interrupt Control Mode.......... 106
Table 5.9
Interrupt Response Times ..................................................................................... 112
Section 7 I/O Ports
Table 7.1
Port Functions....................................................................................................... 121
Table 7.2
Port 1 Input Pull-Up MOS States.......................................................................... 127
Table 7.3
Port 2 Input Pull-Up MOS States.......................................................................... 129
Table 7.4
Port 3 Input Pull-Up MOS States.......................................................................... 132
Table 7.5
Port 6 Input Pull-Up MOS States.......................................................................... 144
Table 7.6
Input Pull-Up MOS States .................................................................................... 153
Table 7.7
Input Pull-Up MOS States (Port B) ...................................................................... 160
Table 7.8
Input Pull-Up MOS States (Port C) ...................................................................... 169
Table 7.9
Input Pull-Up MOS States (Port D) ...................................................................... 173
Table 7.10
Port F Input Pull-Up MOS States ......................................................................... 180
Table 7.11
Input Pull-Up MOS States (Port H) ...................................................................... 192
Section 8 8-Bit PWM Timer (PWM)
Table 8.1
Pin Configuration.................................................................................................. 199
Table 8.2
Internal Clock Selection........................................................................................ 202
Table 8.3
Resolution, PWM Conversion Period, and Carrier Frequency
when
φ = 20 MHz ................................................................................................. 203
Table 8.4
Duty Cycle of Basic Pulse .................................................................................... 206
Table 8.5
Position of Pulses Added to Basic Pulses ............................................................. 207
Section 9 14-Bit PWM Timer (PWMX)
Table 9.1
Pin Configuration.................................................................................................. 212
Table 9.2
Clock Select of PWMX ........................................................................................ 217
Table 9.3
Reading/Writing to 16-bit Registers ..................................................................... 219
Table 9.4
Settings and Operation (Examples when
φ = 20 MHz) ........................................ 222
Table 9.5
Locations of Additional Pulses Added to Base Pulse (When CFS = 1)................ 227
Section 10 16-Bit Timer Pulse Unit (TPU)
Table 10.1
TPU Functions...................................................................................................... 231
Table 10.2
Pin Configuration.................................................................................................. 233
Table 10.3
CCLR2 to CCLR0 (channel 0) ............................................................................. 236
Table 10.4
CCLR2 to CCLR0 (channels 1 and 2) .................................................................. 236