
Rev. 1.00 Mar. 02, 2006 Page xxii of xl
17.7.5
Notes on Board Design ..................................................................................... 582
17.7.6
Notes on Noise Countermeasures ..................................................................... 583
17.7.7
Module Stop Mode Setting ............................................................................... 584
Section 18 RAM ................................................................................................ 585
Section 19 Flash Memory (0.18-
m F-ZTAT Version)....................................587
19.1
Features............................................................................................................................. 587
19.1.1
Mode Transitions .............................................................................................. 589
19.1.2
Mode Comparison ............................................................................................ 590
19.1.3
Flash Memory MAT Configuration.................................................................. 591
19.1.4
Block Division .................................................................................................. 592
19.1.5
Programming/Erasing Interface ........................................................................ 593
19.2
Input/Output Pins.............................................................................................................. 595
19.3
Register Descriptions........................................................................................................ 595
19.3.1
Programming/Erasing Interface Registers ........................................................ 596
19.3.2
Programming/Erasing Interface Parameters ..................................................... 603
19.4
On-Board Programming ................................................................................................... 614
19.4.1
Boot Mode ........................................................................................................ 614
19.4.2
User Program Mode.......................................................................................... 618
19.4.3
User Boot Mode................................................................................................ 628
19.4.4
Storable Areas for Procedure Program and Program Data ............................... 632
19.5
Protection.......................................................................................................................... 641
19.5.1
Hardware Protection ......................................................................................... 641
19.5.2
Software Protection........................................................................................... 642
19.5.3
Error Protection ................................................................................................ 642
19.6
Switching between User MAT and User Boot MAT........................................................ 644
19.7
Programmer Mode ............................................................................................................ 645
19.8
Serial Communication Interface Specifications for Boot Mode ....................................... 646
19.9
Usage Notes ...................................................................................................................... 674
Section 20 Clock Pulse Generator..................................................................... 677
20.1
Oscillator .......................................................................................................................... 678
20.1.1
Connecting Crystal Resonator .......................................................................... 678
20.1.2
External Clock Input Method............................................................................ 679
20.2
Duty Correction Circuit .................................................................................................... 682
20.3
Subclock Input Circuit ...................................................................................................... 682
20.4
Subclock Waveform Forming Circuit............................................................................... 683
20.5
Clock Select Circuit .......................................................................................................... 683
20.6
Usage Notes ...................................................................................................................... 684