
Rev. 1.00 Mar. 02, 2006 Page xii of xl
7.1.1
Port 1 Data Direction Register (P1DDR).......................................................... 126
7.1.2
Port 1 Data Register (P1DR)............................................................................. 126
7.1.3
Port 1 Pull-Up MOS Control Register (P1PCR)............................................... 127
7.1.4
Pin Functions .................................................................................................... 127
7.1.5
Port 1 Input Pull-Up MOS ................................................................................ 127
7.2
Port 2................................................................................................................................. 128
7.2.1
Port 2 Data Direction Register (P2DDR).......................................................... 128
7.2.2
Port 2 Data Register (P2DR)............................................................................. 128
7.2.3
Port 2 Pull-Up MOS Control Register (P2PCR)............................................... 129
7.2.4
Pin Functions .................................................................................................... 129
7.2.5
Port 2 Input Pull-Up MOS ................................................................................ 129
7.3
Port 3................................................................................................................................. 130
7.3.1
Port 3 Data Direction Register (P3DDR).......................................................... 130
7.3.2
Port 3 Data Register (P3DR)............................................................................. 130
7.3.3
Port 3 Pull-Up MOS Control Register (P3PCR)............................................... 131
7.3.4
Pin Functions in Each Mode ............................................................................. 131
7.3.5
Port 3 Input Pull-Up MOS ................................................................................ 132
7.4
Port 4................................................................................................................................. 132
7.4.1
Port 4 Data Direction Register (P4DDR).......................................................... 132
7.4.2
Port 4 Data Register (P4DR)............................................................................. 133
7.4.3
Pin Functions .................................................................................................... 133
7.5
Port 5................................................................................................................................. 136
7.5.1
Port 5 Data Direction Register (P5DDR).......................................................... 136
7.5.2
Port 5 Data Register (P5DR)............................................................................. 136
7.5.3
Pin Functions .................................................................................................... 137
7.6
Port 6................................................................................................................................. 138
7.6.1
Port 6 Data Direction Register (P6DDR).......................................................... 138
7.6.2
Port 6 Data Register (P6DR)............................................................................. 139
7.6.3
Pull-Up MOS Control Register (KMPCR) ....................................................... 139
7.6.4
Noise Canceller Enable Register (P6NCE)....................................................... 140
7.6.5
Noise Canceller Decision Control Register (P6NCMC)................................... 140
7.6.6
Noise Cancel Cycle Setting Register (P6NCCS) .............................................. 141
7.6.7
Pin Functions .................................................................................................... 143
7.6.8
Port 6 Input Pull-Up MOS ................................................................................ 144
7.7
Port 7................................................................................................................................. 144
7.7.1
Port 7 Input Data Register (P7PIN) .................................................................. 144
7.7.2
Pin Functions .................................................................................................... 145
7.8
Port 8................................................................................................................................. 145
7.8.1
Port 8 Data Direction Register (P8DDR).......................................................... 145
7.8.2
Port 8 Data Register (P8DR)............................................................................. 146